This paper presents TCAD process, mesh, and device simulations of a 1200 V vertical gallium nitride (GaN) FinFET using Silvaco Victory tools

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Join Silvaco at DAC 2026 July 26 – July 29, 2026 Long Beach Convention Center | Booth 1155 Join us at DAC…

May 19, 2026

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May 7, 2026

In our latest Simulation Standard we  examines how Silvaco’s AI-powered Fab Technology Co-Optimization (FTCO™) platform, combining simulation at scale, smart Design of…

April 20, 2026

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2026-03-30

Next generation displays are utilizing tandem organic light-emitting diode (OLED) topologies to improve panel performance.

2026-03-12

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SURGE Virtual Event North America 2026 Archive Now Available Silvaco SURGE unites the semiconductor development and design community to explore how Silvaco’s…

β-Ga2O3 is set to revolutionize high-voltage power conversion, with ultra-low losses and a high critical electric field that make it ideal for…

SURGE Virtual Event EMEA 2026 Archive Now Available Silvaco SURGE unites the semiconductor development and design community to explore how Silvaco’s simulation…

With the 2025 release, Silvaco is yet again leading innovation in TCAD, driven by its over 40 years of experience. This release…

2025-11-20

In this paper we will discuss accelerating vertical GaN power technology development with physics-based Digital Twins for 800V DC AI factory power…

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In this paper we demonstrate the application of the Silvaco TCAD suite from the technology process to circuit analysis for a planar…

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2025-09-04

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This is an introduction to the impedance field method and its application to the calculation of the small-signal noise in Victory Device.

This edition introduces trajectory replication in Victory Process Monte Carlo ion implantation, with a focus on: Reducing computation time by reusing ion…

2025-08-13

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In this article, we will present application examples of stress analysis in Victory Process.

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As the scaling of CMOS devices continues, the accuracy requirements for simulating ion implantation and diffusion processes have become increasingly stringent.

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Victory Extract is a new tool for the 2024 baseline release. Victory Extract unifies the older extraction offerings from DeckBuild (extract), Victory…

2025-01-14

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This article introduces a DPT-based simulation method to perform the transient switching characteristics of an IGBT device. It also provides standard templates…

2024-09-16

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Section 1: Process Simulation – New Features in 2024 Baseline Release Section 2: Device Simulation – New Features in 2024 Baseline Release…

2024-08-07

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It is often the case that a design of experiments (DOE) is required to optimize the performance of a particular device.  Sometimes…

May 30, 2024

Recently a new diffusion model was introduced to Victory Process: the CMOS model. This model aims at taking on the challenges brought…

2024-05-08

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Properly setting the wafer orientation in Victory Process (VP) is critical for various processes such as ion implantation, etching, and deposition. For…

Photonic integrated circuits (PICs) are a key enabling technology for a broad range of current and next-generation products. Combining semiconductor materials and…

2024년 3월 28일 SiC 소자의 스위칭 동작 중에, 소자가 과부하 비정상 상태에 도달할 수 있으므로, 일부 애플케이션에서는 강력한 사양이 필요합니다 (예: 단락…

This paper presents a TCAD modeling approach for HfO2-based ReRAM (Resistive Random Access Memory). For describing the switching and retention behaviors of…

2024-02-08

2024-01-29

2024년 2월 29일 물리 기반 시뮬레이션 툴은 FBH 실험실에서 이러한 차세대 광대역 갭 전자 소자의 개발과 통찰에 필수적입니다. 이번 시간에 실바코 시뮬레이션…

2024년 2월 8일 소형 모델과 매크로 모델을 포함한 전력 소자의 SPICE 모델링에 대한 다양한 접근 방식을 분석합니다.

2023-12-21

Numerical Algorithm to Perform Viscoelastic Analysis Viscous materials exhibit both viscous and elastic characteristics when undergoing deformation. The response of such materials…

New Features in the 2023 Baseline Release: Section 1: Process Simulation – New Features in 2023 Baseline Release Section 2: Device Simulation…

2023-07-06

2023-06-15

2023-05-24

2023년 5월 19일 2:00am-2:30am (한국 시각) 이번 시간에 FinFET 및 메모리 애플리케이션이라는 면에서 기하학적 식각 모델을 제시합니다. 핀 형상 구성, 이상적이지 않은…

The past several years has seen a fast deployment of wide-bandgap power devices in fast chargers, electric vehicles, data centers and renewable…

It is common to run the process simulation for the part of a larger structure just to reduce the computation time. To…

2023년 3월 24일 2:00am-2:30am (한국 시각) 이번 시간에 SmartSpice의 독자적인 4단자 TFT 소형 모델을 채택한 경우의 장점에 대해 살펴보고, SmartSpice Flex Modeling…

The utilization of thin material layers is common in modern semiconductor device fabrication. Subsequent etching steps require an accurate modeling of these…

2023년 2월 24일 3:00am-3:30am (한국 시각) 이번 시간에 포토 다이오드 기술을 소개하고, 다양한 검출기 토폴로지 및 물질 세트에 TCAD를 폭넓게 적용하는 방법에…

2023년 2월 17일 3:00am-3:30am (한국 시각) 이번 시간에 다양한 라이브러리를 개발, 최적화, 검증하는 과제를 소개하고, Cello, Viola, SmartSpice를 활용하여 빠르고 정확한 결과를…

Silver, DeckBuild’s material database viewer, can be used to examine the default parameters in the Silvaco Material DataBase (SMDB) and to generate…

2023년 1월 27일 3:00am-3:30am (한국 시각) 이번 시간에 모델링 소프트웨어 플랫폼에 새로 추가된 Corner and Retargeting 모듈을 소개하고, 실바코의 Utmost IV가 기여한…

The GaN high electron mobility transistor (HEMT) has been commercialized as a power device with performance superior to Si devices in the…

2022-11-08

Accuracy of Impurity Activation is essential in correctly modeling and simulating Silicon Carbide devices. For high concentrations of dopants, it is well…

One of the new features in Victory Device is the ability to add user managed parameters to a log file. This can…

2022년 9월 23일 | 2:00am-2:30am (한국 시각) 이번 시간에 TCAD를 시각적으로 표현하기 위한 Victory Visual의 기능에 대해 살펴봅니다.

The FET physical dimensions continue to shrink to five nm node and below, characterized by new types of architectures with nanosheet (NS)…

2022년 9월 9일 | 2:00am-2:30am (한국 시각) 이번 시간에, 초고밀도 전계효과 트랜지스터(FET) 기술에서 5nm 노드 이하의 최신 기술 아키텍처를 설계하기 위해 원자…

New Features in the 2022 Baseline Release: Section 1: Process Simulation – New Features in 2022 Baseline Release Section 2: Device Simulation…

2022년 8월 12일 | 2:00am-2:30am (한국 시각) 이번 시간에, FinFET 및 메모리 애플리케이션에서의 기하학적 식각 모델을 제시합니다. 핀의 형성, 비이상적 식각 프로파일…

Join Us at DAC 2022 Join us at 2022 Design Automation Conference where we will highlight the company’s wide range of semiconductor…

This work reports on the design of a high efficiency InGaN-based two junction (2J) tandem solar cell via numerical simulation, operating at…

2022년 7월 1일 | 2:00am-2:30am (한국 시각) 이번 시간에 스키매틱와 레이아웃 편집, 최신 TFT 기술에 요구되는 정확한 필드 솔버 기반 기생 추출,…

2022년 6월 10일 | 2:00am-2:30am (한국 시각) 이번 시간에 디스플레이 업계의 고질적인 문제인 화면 잔상에 대한 솔루션과 SPICE 수준에서 시뮬레이션하는 방법을 소개합니다.

Join Us at ISPSD 2022 Join us at The IEEE 2022 International Symposium on Power Semiconductor Devices and ICs (ISPSD) where we…

2022년 5월 31일 | 1:00pm-1:30pm (한국 시각) 이번 시간에 일본의 반도체 에너지 연구소 (Semiconductor Energy Laboratory Co., Ltd)와 실바코가 함께 개발한 결정형…

Self-heating effect may cause over-heated damage and degradation for silicon-on-insulator (SOI) devices, so numerical counting heat generated, and distribution can optimize the…

2022년 5월 13일 | 2:00am-2:30am (한국 시각) 이번 시간에 실바코가 제공하는 AMBA AHB 서브시스템과 제품에 대해 간략하게 소개합니다. 논의 주제에 채널 대…

Join Us at ChipEx 2022 Join us at ChipEx where we will highlight the company’s wide range of semiconductor IP, EDA products and…

2022년 5월 6일 | 2:00am-2:30am (한국 시각) 이번 시간에 양자 전송을 구현하기 위해 최신의 불규칙적 산란 모델을 제시합니다. 이는 파라미터 조정 없이…

2022년 4월 29일 | 2:00am-2:30am (한국 시각) 이번 시간에 SmartSpice의 4단자 TFT 컴팩트 모델에 대해 설명합니다. 업계에서 독자적으로, 이러한 컴팩트 모델의 몇…

Victory Mesh support for line statements lets the user customize the volume mesh used by conformal remesh schemes. The volume mesh data…

2022년 3월 25일 | 2:00am-2:30am (한국 시각) 이번 시간에 실바코의 강력한 Victory Porcess & Design과 함께 mqSemi 및 3D TCAD 모델과 시뮬레이션…

The flat panel display industry has been growing rapidly for recent years in mobile display, car display, AR/VR applications, and large-scale TVs…

2022년 3월 18일 | 2:00am-2:30am (한국 시각) 이번 시간에 실바코의 TCAD Victory Device 시뮬레이션 툴로 다양한 유형의 실리콘 기반 기판의 소신호, 대신호…

2022-03-02

2022년 3월 11일 | 3:00am-3:30am (한국 시각)
 소자 모델링 및 특성화를 위한 Utmost IV의 주요 특징 및 Utmost IV가 핵심 요소를 구성하는…

Platinum and gold are widely used as an effective method to control lifetime in silicon-based devices [1, 2, 3]. Platinum and gold…

2022년 2월 25일 | 3:00am-3:30am (한국 시각)
 소자 시뮬레이션에서 RF와 전력 소자에서 성능을 제한하는 복잡한 소자의 불안정성을 어떻게 나타내는지 구체적인 사례를 들어…

2022년 2월 11일 | 3:00am-3:30am (한국 시각)
 FinFET 스탠더드 셀 레이아웃 설계에서 가장 어려운 과제 중 몇 가지를 살펴보고, 실바코의 Cello를 활용하여…

2022년 2월 18일 | 3:00am-3:30am (한국 시각) 아날로그, 디지털 및 혼합 신호 IC의 물리적 검증을 수행하는 SmartDRC/LVS를 소개합니다.

Introduction Super-junction based devices are a key enabling technology for power devices. Adjacent columns of p and n-type doped material with optimized…

2022년 1월 28일 | 3:00am-3:30am (한국 시각) Victory Mesh의 등각 메쉬 (반구조화 직교 기반 샘플링), 들로네 메쉬 (비구조화 샘플링) 및 그 세부…

2021-12-12

Abstract— Silvaco TCAD simulations are employed to identify relevant current carrying mechanisms in amorphous selenium (a-Se) based detectors, using parameters obtained from…

Abstract— A Singular Point Source MOS (S-MOS) cell concept suitable for power MOS based devices is presented. The S-MOS differs from a…

Abstract—During the last few years, oxide-based ReRAM technology has attracted intense industrial and scientific research interest. Therefore, we have performed an in-depth…

2021-09-02

2021년 9월 10일 | 2:00am-2:30am (한국 시각) SPI (Serial Peripheral Interface) 신호를 사용하는 메모리 소자 중에서 모바일 및 IoT 애플리케이션을 대상으로 하는…

2021년 8월 20일 | 2:00 am–2:30 am (한국 시각) SmartSpice 팀이 개발한 새로운 기능 및 개선 내용을 소개합니다.

New Features in 2021 Baseline Release: Section 1: Process Simulation Section 2: Device Simulation Section 3: Victory Mesh Section 4: Parasitic Extraction

2021년 8월 6일 | 2:00am-2:30am (한국 시각) Victory Atomistic으로 나노 소자 원자의 TCAD 시뮬레이션을 100배 빠르게 실현하는 방법에 대해 소개합니다.

2021년 7월 16일 | 2:00am-2:30am (한국 시각)
 TCAD를 이용한 실리콘 및 페로브스카이트 기반 탠덤 태양전지 시뮬레이션을 소개합니다.

Victory Process (VP) uses two types of mesh to represent the structure: • The geometry mesh, which is used to represent the…

2021년 6월 30일 | 2:00am-2:30am (한국 시각) 실바코의 HiPEX-FS를 활용하여 현실적인 3D 공정 시뮬레이션을 통해 탁월한 성능을 보여줍니다.

June 24, 2021 | 10:00 am – 10:30 am (PDT) 
In this webinar you will learn how Silvaco Foundation IP helps you…

2021년 5월 12일 | 1:00pm-1:30pm (한국 시각) SEL(Semiconductor Energy Laboratory)에서 개발한 CAAC-IGZOⓇ FET (c-축 정렬 결정 IGZO FET)과 SEL과 실바코에서 공동 개발한…

Unlike conventional ohmic contact thin-film transistors (TFTs), contact-controlled TFTs [1], [2] rely on source energy barriers to produce a range of benefits…

2021년 6월 4일 | 2:00am-2:30am (한국 시각) 5주만에 고품질의 IO/ESD 라이브러리를 신속하게 개발하는 방법을 소개합니다.

2021-05-11

2021년 5월 21일 | 2:00am-2:30am (한국 시각) 공정 및 소자 TCAD에 의해 GaN 기반 LED의 설계를 지원하는 과정을 소개합니다.

 2021년 5월 14일 | 2:00am-2:30am (한국 시각) 평면 패널을 설계할 때 확인해야 할 점에 대해 소개합니다.

In this article, the operation of avalanche photo-diodes in the medium gain, continuous operation mode is investigated. In other words, we are…

 2021년 5월 7일 | 2:00am-2:30am (한국 시각) 시뮬레이션을 위한 모델 설정, 물질 및 모델링 특성 수정, 다양한 공정에 대한 시뮬레이션 보정을 소개합니다.

2021-04-14

2021년 4월 21일 | 2:00am-2:30am (한국 시각) 레이아웃 완료 후 기생 성분을 빠르게 분석하여 시뮬레이션 사이클의 낭비를 방지하는 방법을 소개합니다.

2021년 4월 9일 | 2:00am-2:30am (한국 시각) Victory Process에서 TCAD 시뮬레이션을 하기 위해 확산 모델을 생성하는 방법을 소개합니다.

Victory Mesh versions 1.7.2.C and later include two new commands that can be used for complex shape genera-tion. The path and follow…

We detect a local maximum in the design space of a pseudomorphic-channel high electron mobility transistor (PHEMT). The design has an OIP3 …

2021-01-21

2021년 1월 29일 | 3:00am-3:30am (한국 시각) Rafael Microelectronics에서 실바코의 AMBA 서브시스템을 어떻게 최신 IOT 설계에 적용했는지 살펴봅니다. Rafael Microelectronics는 고주파 광대역…

2020년 2월 12일 | 3:00am-3:30am (한국 시각) Wide Band Gap (WBG) 및 ultra-WBG 전력 소자의 설계에 대해 살펴봅니다.

2021년 2월 19일 | 3:00am-3:30am (한국 시각) Victory Mesh에 대해 기본적인 사항을 익히고, Victory Process에서 만든 구조의 메쉬를 다시 설정하는 방법을 배운…

2021년 2월 24일 | 3:00am-3:30am (한국 시각) 스탠더드 셀 및 IO를 포함하는 Foundation IP 제품군의 일부로서 실바코의 Embedded Memory 를 소개합니다.

2021년 3월 5일 | 3:00am-3:30am (한국 시각) 실바코의 SPICE 시뮬레이션 툴, SmartSpice에 대한 일반적인 개요, SmartSpice 4.44.3.R버전의 새로운 기능, 차기 버전에 포함될…

2021년 3월 17일 | 3:00am-3:30am (한국 시각) 실바코의 다양한 SPICE 모델링 솔루션을 살펴봅니다. 실바코의 Utmost IV, TechModeler 그리고 고객에게 제공하는 모델링 서비스에…

2021년 3월 19일 | 3:00am-3:30am (한국 시각) Victory TCAD 공정 시뮬레이터의 기능과 사용법을 설명하고, 경계 조건, 지원하는 솔버, 시뮬레이션 설정 방법 등,…

Gallium Nitride (GaN) based devices such as the High Electron Mobility Transistors (HEMTs) find wide applications in RF and Power domain due…

2021년 1월 15일 | 3:00am-3:30am (한국 시각) STMicroelectronics의 Sharmistha Sinha와 Anand Mishra가 Cello로 수행한 다양한 기술에 대해 분석과 경험을 공유합니다.

2020년 12월 18일 | 3:00am-3:30am (한국 시각) 실바코의 아날로그 커스텀 디자인 솔루션에 대해 설명하고, 2020년 버전에서 상호 운용성, 성능, 생산성이 어떻게 향상되었는지…

In the simulation standard article, “Plasmonic Light Trapping Transforming Thin-Film Photovoltaics” from 2015, the finite difference time domain (FDTD) algorithm was used…

In late October and early November 2020, Silvaco held its fourth annual series of UseRs Global Events (SURGE). Because of the current…

2020-11-24

The 13th International MOS-AK Workshop will be hosted virtually on December 10 and 11, 2020, and Silvaco R&D will be presenting. The MOS-AK Workshop aims…

2020-11-12

Martin Mallinson is an experienced analog circuit designer with multiple patents. Over his 40-year career, his audio designs have been used in…

MEMS World Summit is the world’s foremost annual meeting and business platform for engaging with political, business, financial, research and industry leaders…

2020년 11월 18일 | 3:00am-3:30am (한국 시각) 파티션 기반 시뮬레이션을 채택함으로써 SmartSpice HPP가 아날로그 회로의 과도 시뮬레이션의 모든 내부 측면을 가속화하기 위해…

In this paper the critical design features of a SiC superjunction trench MOS device were optimized using CAD to obtain a high…

Conductive Bridge Random Access Memory (CBRAM) is a non-volatile memory device technology that can operate by consuming very low power. Another advantage…

The qualification of GaN power high-electron-mobilitytransistors (HEMTs) must consider the device ruggedness against out-of-SOA (safe operating area) events [1- 3].

Dry etching is commonly used in semiconductor processing to generate deep trenches with good anisotropy. Dry etching is applied to many semiconductor…

2020-09-09

September 17, 2020 | 13:00 – 13:30 (JST) The accuracy of rule-based full-chip parasitic capacitance extraction tools including Silvaco's Hipex is highly…

2020년 10월 14일 | 2:00am-2:30am (한국 시각) 계산량이 지속적으로 증가하고, 메모리 시스템이 점점 높은 주파수에서 동작함에 따라, 고밀도, 저전력으로 면적을 적게 차지하는…

Silvaco technologists and research partners will be participating in the ESSDERC/ESSCIRC 2020 joint conference for solid-state devices and circuits.  Tutorial #8, Ab-initio…

2020-08-26

2020 TCAD Baseline Release Section 1: Process Simulation – New Features in 2020 Baseline Release

2020 TCAD Baseline Release Section 2: Meshing – New Features in 2020 Baseline Release

2020 TCAD Baseline Release Section 3: Device Simulation – New Features in 2020 Baseline Release

2020년 8월 28일 | 2:00am-2:30am (한국 시각) 최신 SoC의 고속 인터페이스 설계 개발과 관련된 당면 과제 및 솔루션에 대한 프레젠테이션을 제공합니다.

by Babak Taheri, Silvaco CEO In 1966 Robert F. Kennedy delivered a speech that mentioned a curse, “May you live in interesting…

2020년 7월 29일 | 2:00am-2:30am (한국 시각) AMBA 기반 하드웨어 및 소프트웨어 시스템 설계의 보안에 사용되는 일반적인 방법에 대해 설명합니다.

2020년 7월 31일 | 2:00am-2:30am (한국 시각) Leti-NSP 모델을 기반으로 수직 적층 나노시트에 대한 파라미터 추출 방법을 제시합니다.

The ESD Alliance CEO Outlook was held on June 17, 2020. This year’s informative event, featuring six prominent industry CEOs, was conducted…

2020년 5월 19일 | 2:00am-2:30am (한국 시각) 삼성 파운드리 및 삼성 파운드리의 공정 능력과 실바코가 제공하는 IP 지원 기능을 자세히 소개합니다.

2020년 6월 12일 | 2:00am-2:30am (한국 시각) 최적의 시뮬레이션 성능을 얻기 위해 SmartSpice에서 컴팩트 모델을 개발하는 방법을 안내합니다. 사용자 지정 Verilog-A 모델을…

2020년 6월 5일 | 2:00am-2:30am (한국 시각) 실바코의 Victory Device 시뮬레이터에 있는 Chemistry Module에 기초하여, 포괄적이고 유연한 ReRAM 모델을 제시합니다.

2020년 6월 26일 | 2:00am-2:30am (한국 시각) 새로운 접근 방식과 다른 애플리케이션에 적용되는 방식을 검토합니다. 실바코의 머신 러닝 기반 EDA 툴의 예제를…

2020년 5월 15일 | 2:00am-2:300am (한국 시각) 실바코의 Utmost IV 모델링 소프트웨어를 사용하여 FPD 애플리케이션과 관련된 SPICE 모델링 접근 방식 및 방법에…

2020년 4월 24일 | 3:00am-3:30am (한국 시각) 시간 영역에서 실바코의 광학적 시뮬레이션 기능, 즉 FDTD(Finite Different Time Domain) 방법에 대해 개략적으로 설명합니다.

2020-04-07

2020-04-02

The Simulation Standard, Silvaco’s technical journal for semiconductor process and device engineers is beginning its 30th year of publication. The latest issue…

2020-03-30

2020년 4월 3일 | 2:00am-2:30am (한국 시각) 드리프트 확산 시뮬레이션은 다층 OLED 소자 연구에 폭넓게 적용할 수 있지만, 미시적인 방법은 소자 규모로…

Silvaco TCAD has been used by Tier 1 power device manufactures and designers for decades. The introduction of Victory Process, Victory Mesh,…

The market for cellular components has been shifting rapidly from GaAs pHEMT or silicon-on-sapphire (SOS) to silicon-based technology. CMOS (silicon-on-insulator) SOI antenna…

It is crucial for any kind of calculations that units are consistent between equations and modeling modules. Often different units are used…

2020년 3월 13일 | 2:00am-2:30am (한국 시각) UTMOST IV: Quick-Start Optimization Templates에서 사용할 수 있는 새로운 기능을 소개합니다. 이 기능은 사용자가 데이터를…

Victory Mesh initially supported loading and remeshing of the saved status from Victory Process. Victory Mesh 1.5.0 onwards is now able to…

Nanoscale Devices The full text for most of these papers may be found at the IEEE website at www.ieee.org. P. Blaise,1,2 “Ab Initio…

Solar Cells The full text for most of these papers may be found at the IEEE website at www.ieee.org. Samy Almosni,[a,b] Ludmila Cojocaru,[a] Debin Li,[c] Satoshi…

MEMS The full text for most of these papers may be found at the IEEE website at www.ieee.org. Yonghyun Shim, Member, IEEE, Jean-Pierre…

Memory Devices The full text for most of these papers may be found at the IEEE website at www.ieee.org. Daewoong Kang, Hyungcheol Shin,…

Optoelectronics The full text for most of these papers may be found at the IEEE website at www.ieee.org. H. Matsuura, S. Sakurai, Y.…

Radiation, SEU and Reliability The full text for most of these papers may be found at the IEEE website at www.ieee.org. Takashi Kameshima,…

Power Device Simulation The full text for most of these papers may be found at the IEEE website at www.ieee.org. Viviana Cerantonio, Marcello…

ESD Simulation The full text for most of these papers may be found at the IEEE website at www.ieee.org. Guido Notermans, Olivier Quittard,…

Organic Device Technology The full text for most of these papers may be found at the IEEE website at www.ieee.org. Debin Li, “Recent…

Interconnect Simulation The full text for most of these papers may be found at the IEEE website at www.ieee.org. Keh-Jeng Chang, Jyh-Jeng Chou,…

SOI Technology The full text most of these papers may be found at the IEEE website at www.ieee.org. Ali A. Orouji, Hamid Amini…

TFT Technology The full text for most of these papers may be found at the IEEE website at www.ieee.org. Yu-Shien Shiah1, Kihyung Sim1, Yuhao…

Compound Devices The full text for most of these papers may be found at the IEEE website at www.ieee.org. N. Seoane1, M. Aldegunde1,…

CMOS Technology The full text for most of these papers may be found at the IEEE website at www.ieee.org. T Uchino1, 2, E Gili1,…

Process Simulation The full text for most of these papers may be found at the IEEE website at www.ieee.org. Guriqbal Singh Josan, Archana…

2020년 2월 28일 | 3:00am-3:30am (한국 시각) I3C는 핀의 갯수 감소, 성능 향상, 소비전력 감소 및 I2C 인터페이스와의 하위 호환성에 탁월합니다. 2020년…

2020-02-19

2020년 2월 14일 | 3:00am-3:30am (한국 시각) 실바코 TCAD 툴 중 하나인 Victory Atomistic (VA)의 시뮬레이션 성능을 소개합니다. VA는 퍼듀 대학에서 만든…

2020-02-05

The MIPI Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries. There is at least one MIPI specification in every smartphone…

2020년 1월 17일 | 3:00am-3:30am - (한국 시각) Jivaro에 대한 간략한 소개 후, 더 나은 넷리스트 감소를 위해 필요한 기능과 제어 기법을…

As process nodes continue to shrink, the requirement for additional physics-based simulation is gradually creeping into each stage of the design process.…

IEDM is THE device conference with more than a thousand participants from major companies and R&D institutes. Many talks were dedicated to…

CMOS: Mixed-Signal Circuit Design, Second Edition R. Jacob Baker. Published Wiley-IEEE Press, 2nd Edition. Published 2009, pp. 330 ISBN 978-0-470-29026-2 Understanding Modern…

2019년 12월 13일 | 3:00am-3:30am (한국 시각) 가상 물리적 차량 시스템의 보안에 대한 위험과 대책을 제시합니다. 제조업체들은 인포테인먼트, 5G 네트워크 연결, 첨단…

Silvaco has an upcoming webinar IP Solutions for Secure Autonomous Driving on Dec. 3, 10am – 11am (PST) . The webinar will…

2019년 11월 22일 | 3:00am-3:30am (한국 시각) 셀렉트 게이트 트랜지스터를 중심으로 3D NAND 메모리 셀의 동작을 최적화하기 위해 TCAD 공정 및 소자…

At our SURGE Santa Clara event in October, Cameron Fisher, CEO of Mobile Semiconductor described their experience in adopting SmartSpice as their…

The IEEE International Electron Devices Meeting (IEDM) is the world’s preeminent forum for reporting technological breakthroughs in the areas of semiconductor and…

2019년 11월 8일 | 3:00am-3:30am (한국 시각) 4K~100K 온도에서 실리콘 소자의 동작 시뮬레이션에 drift-diffusion 방법을 사용할 때 발생하는 문제에 대해 논의합니다.

2019년 11월 1일 | 3:00am-3:30am (한국 시각) 실바코의 TCAD 툴을 소개하고, wide bandgap 물질에 대한 공정 및 소자 시뮬레이션 기능을 살펴봅니다.

The power electronics (PE) market is growing rapidly, driven by the accelerating demand of EV and HEV vehicles. Power devices lend themselves…

By this definition, any SPICE simulator qualifies as a smart design tool, but what about versatility? SmartSpice has had over 30 years…

2018년 12월 7일 | 시각: 3:00am-3:30am (한국 시각) 인공지능(AI)과 머신러닝(ML) 기반 SoC의 개발 과제를 논의합니다.

2019년 10월 11일 | 2:00am-2:30am (한국 시각) 반도체 기술이 발전함에 따라 on-chip 변동의 영향이 커지며, 이는 보다 정교한 솔루션이 필요하다는 것을 의미합니다.…

Diamond is considered to be the ultimate semiconductor material for high power and high frequency devices due to its superior electrical and…

2019-09-18

2019-09-16

PowerAmerica’s strategic roadmap for next generation wide bandgap (WBG) power electronics (PE) came out earlier this year. The public version of the…

Abstract— A complete simulation flow for a Nanowire-based ring oscillator circuit is presented, where the active devices were simulated using an atomistic…

y first IC design back in 1978 was a DRAM and it ran on 12V, 5V and -5V, but then my second…

Abstract—There are several device challenges unique to the select gate transistor in 3D NAND memory cell. It requires low leakage current to…

In this paper, in order to understand trap-rich substrate behavior, passive and active device on SOI with trap-rich layer structures were simulated…

Introduction Diamond is considered to be the ultimate semiconductor material for high power and high frequency devices due to its superior electrical…

I started out my engineering career by doing transistor-level circuit design and we used a proprietary SPICE circuit simulator. One thing that…

A quick search of the IEEE Xplore online library gives a list of more than 230 published technical articles on Power Device…

일시: 2019년 8월 16일 | 시각: 2:00am-2:30am (한국 시각) Clever는 고정밀 적응형 메쉬 필드 솔버를 채용하여, Hipex에서 Stellar를 실행하거나 규칙 기반 기생…

Over the past 50 years in our industry, there have been three invariant principles: Moore’s Law drives the pace of Si technology…

In the creation of an ASIC or SoC a wide variety of digital components are needed. Standard logic cells are used to…

2019-08-01

In the world of SoC development, an IP management system is software for the licensing, distribution and compliance administration of design IP…

2019-07-23

In the following video, Dr. Firas Mohamed, VP & GM, Machine Learning & Flow Optimization Division and GM, Silvaco France talks with…

2019-07-17

일시: 2019년 7월 12일 | 2:00am-2:30am (한국 시각) 실바코의 SIPware의 관련 표준 및 오토모티브 컨트롤러 IP의 기능에 대한 검토를 통해 자동차의 개별…

I interviewed Silvaco partner Stephen Fairbanks, CTO of Certus Semiconductor from the show floor at DAC 2019, in Las Vegas, about I/O…

Introduction Gallium nitride (GaN)-based devices are excellent candidates for high-voltage and high-power applications, due to the superior physical properties of GaN compared…

Introduction Amorphous In-Ga-Zn-O thin-film transistors (a-IGZO TFTs) show a high mobility, a small sub-threshold swing, and a low OFF-current, and they are…

Abstract — Dual junction solar cells were simulated using Silvaco TCAD tool with various tunnel junction material compositions. InGaP/GaAs dual junction solar…

New system-on-chip (SoC) devices are driving new memory architectures and photonic interfaces, while specialized new intellectual property (IP) requires analysis down to…

Q. Is it possible to emulate a deep reactive ion etch process (e.g. deep trench with scalloped sidewalls) without using a physical…

2019년 6월 26일 | 2:00am-2:30am (한국 시각) Verilog-A으로 SPICE 컴팩트 모델을 구현하기 위한 전문적인 가이드를 소개합니다.

In the following video, I interview Silvaco customer Randy Caplan of Silicon Creations from the show floor at DAC 2019, in Las…

2019년 7월 25일 | 3:00am-3:30am (한국 시각) Clever LCD를 이용하여 위상 전용 LCoS-SLM을 분석하는 방법을 소개하고, 픽셀 구동 및 픽셀 크기 축소…

2019년 6월 19일 | 2:00am-2:30am (한국 시각) 회로 시뮬레이션은 보드, IC 및 패키지의 설계에 중요한 역할을 담당하고 있습니다. 처리 규모와 효율을 극대화하려면…

On Monday, May 13, Silvaco announced that the semiconductor design IP of Samsung Foundry is now marketed, licensed and supported through Silvaco.…

2019-06-03

Silvaco and Si2 Release Unique, Free 15nm Open-Source Digital Cell Library Silvaco Contribution to Si2 Will Improve Innovation in State-of-the Art Nanometer…

2019년 5월 29일 | 3:00am-3:30am (한국 시각) Victory Process와 함께 TCAD 공정 시뮬레이션에 대해 논의합니다. 반도체 공정 시뮬레이션, 구조 설계 및 공정…

2019-05-28

2019년 5월 29일 | 3:00am-3:30am (한국 시각) Victory Process와 함께 TCAD 공정 시뮬레이션에 대해 논의합니다. 반도체 공정 시뮬레이션, 구조 설계 및 공정…

Silvaco did Executive Video Interviews at our booth in the middle of the show floor at Display Week 2019 in San Jose.…

2018년 5월 23일 | 3:00am-3:30am (한국 시각) OS TFT 소자 시뮬레이션에 실바코 툴을 사용하는 방법을 소개합니다. 이동도 모델과 DOS (subgap state의 밀도)…

2019-05-21

2019년 5월 22일 | 3:00am-3:30am (한국 시각) 이번 시간에 새로운 소자 시뮬레이션 데크를 구현합니다. DeckBuild를 사용하여 완전한 기능을 갖춘 소자 시뮬레이션 데크를…

2019-05-21

2019-05-20

On Monday, May 13, Silvaco announced that the semiconductor design IP of Samsung Foundry is now marketed, licensed and supported through Silvaco.…

Samsung Foundry Begins Partnership with Silvaco to Launch their Semiconductor IP Assets Santa Clara, CA – May 13, 2019 – Silvaco Inc., a…

2019-05-13

Silvaco has a large booth in the middle of the show floor at Display Week 2019 at the San Jose Convention Center,…

2019년 5월 8일 | 3:00am-3:30am (한국 시각) TCAD와 실바코 TCAD 툴에 대한 개요를 살펴봅니다. TCAD의 정의 및 활용과 TCAD의 미래에 대해 설명합니다.…

2019년 5월 3일 | 2:00am-2:30am (한국 시각) Expert를 사용자 정의하는데 필요한 JavaScript API의 기본에 대해 살펴봅니다.

2019년 5월 1일 | 3:00am-3:30am (한국 시각) 이번 시간에 커맨드 파일 및 GDSII 레이아웃을 이용한 설계 기술 공동 최적화 (Design Technology Co-Optimization,…

Radiant is a graphical user interface (GUI) for TCAD simulations which lowers the entry barrier for inexperienced users to doing technology analysis.…

2019년 4월 26일 | 2:00am-2:30am (한국 시각) 이번 시간에 병렬, FastSPICE 분석 모드 등, SmartSpice 시뮬레이터의 핵심 내용에 대해 깊이 있게 소개합니다.

2019-04-23

2019년 4월 24일 | 2:00am-2:30am (한국 시각) 플래시 메모리, 기타 최신 비휘발성 메모리 기술, 정교한 SoC (예: Nvidia의 Xavier, Apple의 A12) 등,…

The number and complexity of automotive SoCs and Control Systems is growing dramatically to fill the demand for new features in next-generation…

2019-04-16

library of digital standard cells implements both Boolean logic and sequential storage functions. These foundation IPs are used extensively and repeatedly within…

2019년 4월 5일 | 3:00am-3:30am (한국 시각) 이번 시간에 실바코의 TCAD 툴 세트로 진화하는 NEMO5의 원자 시뮬레이션 기능을 소개합니다. NEMO5는 65명 이상의…

2019 baseline release of Victory Process includes improvements and extensions to the following modules: Physical etching/deposition Stress simulation Annealing/oxidation

The 2019 TCAD baseline release of Victory Mesh now contains Solid Modeling functionality. The term Solid Modeling is used to refer to…

The effect of Coulomb interaction in the absorption spectrum of quantum wells (QWs) is responsible for the quantum confined Stark effect (QCSE),…

DeckBuild is Silvaco’s state of the art simulator interface. It is capable of running all simulators from Silvaco as well as many…

Bipolar Technology The full text for most of these papers may be found at the IEEE website at www.ieee.org. A. S. Zoolfakar, N.…

2019년 3월 27일 | 2:00am-2:30am (한국 시각) GaN HEMT 소자에 대해 전에 제시한 파라미터 추출 방법론을 계속해서 설명합니다.

Dr. Misha Temkin was a beloved colleague and researcher who worked at Silvaco for over 30 years. He passed on March 12,…

Graham Bell sits down with Bernardo Culau, Director of Characterization, to discuss the challenges and Solutions of Nanometer Library Characterization. They also…

2019년 3월 22일 | 2:00am-2:30am (한국 시각) 공정의 변동을 지원하는 새로운 형식을 포함하여 라이브러리 특성화의 정확성을 높이려면, 시뮬레이션과 PVT 코너가 더 많이…

Silvaco just announced an agreement with Avery Designs for the distribution of Avery’s verification IP (VIP) for the MIPI I3C sensor interface…

2019년 3월 1일 | 3:00am-3:30am (한국 시각) 이번 시간에 실바코의 TCAD 툴에서 이용할 수 있는 신뢰성 모델 중의 몇 가지를 소개합니다.

2019-02-26

Silvaco, Inc. and Avery Design Systems Partner to Deliver Complete CAN-FD Automotive and MIPI I3C IP and VIP Solutions TEWKSBURY, MA. and…

2019-01-28

2018년 1월 16일 | 3:00am-3:30am (한국 시각) 이번 시간에 소자 특성에 영향을 미치는 주요 요인을 포함하여, 플렉서블 디스플레이에 필요한 소자 설계의 기본…

Introduction Low-temperature polycrystalline silicon (LTPS) thin-film transistors have been widely applied to AMOLED (Active Matrix Organic Light Emitting Diode) as the most…

Introduction With the recently launched Radiant, a graphical user interface (GUI) for Atlas-based TCAD simulations, the entry barrier for inexperienced users has…

Organic thin-film transistors (OTFTs) are promising devices for future low-cost electronics[1][2]. However, to enable the development of this technology, circuit design simulation…

Introduction In this article we will emphasize two new features of the DeckBuild deck editing environment. These are the movie creation on…

by Thomas Blaesi It was 1988 when I got into SPICE (Simulation Program with Integrated Circuit Emphasis) while I was characterizing a…

2018년 12월 19일 | 3:00am-3:30am (한국 시각) 일반적인 IoT 시스템에 마이크로프로세서 코드를 저장하고 실행하기 위한 다양한 방법에 대해 논의합니다.

2018년 12월 12일 | 3:00am-3:30am (한국 시각) NEMO는 NEGF (Non-Equilibrium Greens Function Formalism)와 원자의 강력한 결합을 오늘날의 최첨단 소자 모델링으로 확립하였습니다. NEMO의…

2018년 12월 7일 | 3:00am-3:30am (한국 시각) 플렉서블 전자 회로 설계 및 물리적 검증에서 기계적 변형을 고려하여 TFT 및 MOSFET SPICE 모델을…

2018년 11월 30일 | 3:00am-3:30am (한국 시각) MIPI Alliance – I3C의 새로운 표준에 대한 논의합니다. I2C와 SPI 등의 기존 인터페이스를 통합 및…

As process nodes continue to shrink, the requirement for additional physics is gradually creeping into each stage of the design process. By…

The previously standalone Stellar GUI based field solver tool for parasitic extraction is now integrated into Hipex (Silvaco’s full chip extraction tool)…

We have demonstrated in previous articles the static electrical and optical simulation of LC cells [1][2]. The last piece of the function…

OBJECTIVE Add an impurity (H) to a material (silicon) for a diffusion model (Fermi). The description below refers to Victory Process version…

2018년 9월 21일 | 2:00am-2:30am (한국 시각) VarMan은 Variability eXplorer, 하이-시그마 Yield Estimation, 하이-시그마 Performance Limit, eXtreme Memory Analysis 등을 포함합니다. 높은…

2018년 8월 22일 | 3:00am-3:30am (한국 시각) 이번 시간에 FPD 레이아웃의 설계 생산성을 높이기 위한 실바코의 레이아웃 에디터, Expert의 새로운 기능을 소개합니다.

2018년 7월 20일 | 2:00am-2:30am (한국 시각) GaN HEMT 소자에 대한 모델 파라미터 추출 방법을 제시합니다. Verilog-A 및 시뮬레이터 내장 모델에 대한…

스탠더드 셀 레이아웃의 마이그레이션 및 최적화 본 웹 세미나에서는 스탠더드 셀 라이브러리의 마이그레이션 및 최적화에 필요한 효율적인 방법론을 제시합니다. 기술 노드 간…

One of wide bandgap semiconductors, SiC has been widely applied to the power devices, and then, the super-junction MOS transistor of SiC…

Previously published fast empirical models for diffusion coefficients in silicon-germanium (Si1-x Gex) [1][2] were not applicable to high germanium content x≥0.5 and…

Gallium nitride (GaN)-based devices for power electronics show superior performance in comparison to silicon carbide and silicon-based devices [1]–[3]. The development of…

This document describes how to setup a virtual environment suitable for the deckbuild remote mode. The host system to consider shall be…

2018년 6월 22일 | 3:00am-3:30am (한국 시각) 실바코의 TCAD를 소개하고, 반도체 소자 물리학 학습과 물리 기반 모델링으로 새로운 기술의 탐구 및 설계에…

일시: 2018년 6월 20일 | 2:00am-2:30am (한국 시각) 기생 추출 결과의 검토 및 기생 넷리스트에 대한 분석에 필요한 방법과 툴에 대해 살펴봅니다.

2018년 6월 15일 | 시각: 2:00am-2:30am (한국 시각) 반도체 기업들이 현재 직면한 문제와 내외부 IP를 기업 차원에서 정리하는 기술, 그리고 데이터 설계뿐만…

2018년 5월 18일 | 3:00am-3:30am (한국 시각) 응력 시뮬레이션에 사용되는 수치적인 방법을 검토하고 간단한 구조에 대한 분석 모델과 비교하며, 변형을 유발하는 응력에…

서브시스템의 이해 IAR의 Embedded Workbench를 사용하여 실바코 서브시스템 디버깅 실바코와 IAR Systems가 실바코의 AMBA 서브시스템을 위한 소프트웨어 솔루션을 제공하기 위해 협력하였습니다. 실바코의…

Cryogenic electronics plays a fundamental role in several applications, such as spacecraft, high-energy physics experiments, metrology, superconductive astronomical detectors and, with the…

For high performance large area flexible electronics, amorphous metal oxide semiconductor based thin film transistors offer many advantages. These include high mobility,…

Gallium Nitride High Electron Mobility (GaN HEMT) device technology has gained a lot of traction during the last years. These devices have…

Geometrical module of Victory Process allows the fast and accurate transfer of mask patterns to the structure. However, sometimes it is necessary…

2018년 3월 30일 | 3:00am-3:30am (한국 시각) 필드에 기초한 솔루션은 현실같은 3D 구조에서 추출할 수 있으며, RC 기생 성분에 영향을 미치는 상세한…

VarMan에 의한 스탠더드 셀 통계 특성화 각각의 새로운 반도체 공정 노드에서, 전체적 혹은 부분적 공정 변동은 스탠더드 셀 라이브러리의 성능 결정에 점점…

SPI vs SPI 이번 시간에 실바코의 SPI, QSPI, OSPI IP 제품에 대해 설명하고, SOC에서 어떻게 사용하는지에 대해 논의합니다. 소형 IoT 소자에서 복잡한…

Lower conduction loss and fast switching characteristics for power devices are increasingly required in the more and more energy-conscious world. For the…

It is often the case, that an Engineer is required to simulate environmental effects on a device manufactured by a third party. …

In recent years, radio-frequency (RF) CMOS on Silicon-on-Insulator (SOI) has rapidly evolved as a mainstream technology for switches used in wireless applications…

일시: 2017년 12월 8일 | 3:00am-3:30am (한국 시각) Gateway 툴 플로우에 iPDK 디자인 키트를 통합하는 것에 대해 논의합니다.

2017년 10월 26일 | 3:00am-3:30am (한국 시각) 이번 시간에 반도체 소자의 이온 수송과 전기 화학 시뮬레이션에 대해 논의합니다.

In connection with the reduction in the size of electronic elements and the increase in operating frequencies, it becomes necessary to transmit…

SmartSpice API, shared mode, was developed in order to provide an easy to use solution for products requiring the analog SPICE core…

Amorphous In-Ga-Zn-O (a-IGZO), which is a typical amorphous oxide conductor (AOS), is considered to be one of the most promising channel materials…

Victory Process now includes the Victory Stress library directly within the process simulator, which removes the necessity to keep switching from process…

Gallium nitride (GaN)-based devices have entered the power electronics market and are showing excellent progress in the medium power conversion application [1]-[5].…

새로운 MIPI Alliance I3CSM 표준에 대해 소개 오늘날 모바일 기기는 최저 전력으로 더 빨리 정보를 전달하기 위해 다양한 종류의 센서를 포함합니다. 이를…

In a previous article in Simulation Standard article entitled “Soft Error Simulations”, we discussed various ways to simulate soft errors using either…

Liquid Crystals (LCs) are widely used in the display technology due to the property of optical birefringence. Being sandwiched by two crossed…

Researchers and designers are looking into a future of ultra-low power and ultra-low voltage (ULV) devices and designs. Portable devices, nodes, and…

TFT panels have already gained their undisputable reputation in a variety of professional and commercial applications. High quality, ease of customization, and…

2016년 5월 17일 | 2:00am-2:30am (한국 시각) 이번 시간에 실바코의 EDA 툴 포트폴리오에 의한 TFT 및 FPD 설계 기법을 소개합니다.

2017년 5월 5일 | 3:00am-3:30am (한국 시각) 이번 시간에 TFT, LCD, OLED 디스플레이 설계에 활용할 수 있는 다양한 TCAD 기반 시뮬레이션 기법에…

2017년 4월 21일 | 2:00am-2:30am (한국 시각) 간단한 최소한의 입력 데이터를 사용하여, 다양한 유형의 IC 설계 초기에 전력, EM, IR drop을 분석할…

Compared with regular MOSFET devices, the body bias effect in HVMOS is usually more pronounced. In addition to the regular threshold voltage…

3D TFT analysis has been getting lots of attention due to issues caused by 3D effects such as the edge effect on…

Dual-Gate Thin Film Transistors (DGTFTs) are often used in pixel driver and peripheral circuits for liquid crystal displays. This is because of…

The planar bulk Si metal-oxide semiconductor field-effect transistor (MOSFET) has reached its scaling limit due to various short channel effects (SCE). With…

2017년 3월 24일 | 2:00am-2:30am (한국 시각) 기생 추출은 물리적 디자인을 완성하기 위한 필수 단계로서, 최신 노드에서는 기생 성분이 회로 디자인의 동작에…

2015년 2월 18일 | 3:00am-3:30am (한국 시각) 이번 시간에 우주 또는 다른 높은 에너지 입자나 광원 근처의 방사선 환경에 노출되었을 때, 산화물…

2017년 1월 27일 | 3:00am-3:30am (한국 시각) 이번 시간에 LED와 OLED 소자의 통합 시뮬레이션 환경으로 개발된 Radiant를 소개하고, 뛰어난 효율과 색 품질,…

Semiconductor devices such as bipolar power transistors and solar cells may operate over a range of optical or electrical injection levels. In…

During the last several years, the enhancement of integrated circuits (ICs) performance and power consumption have contributed to the continual scaling down…

Q: How do I extract geometric information, such as material thickness or junction depth, from the current 3D process simulation using Victory…

2016년 12월 9일 | 3:00am-3:30am (한국 시각) Victory Process는 데이터 구조, 그리드, 솔버를 포함한 혁신적인 기술을 많이 사용하여, 기존 공정 시뮬레이터에 비해…

일시: 2016년 11월 11일 | 3:00am-3:30am (한국 시각) VarMan은 아날로그 설계자를 위한 구체적인 통계 분석을 포함합니다. 아날로그 셀 또는 AMS/RF IC를 신속하게…

Some electronic devices operate at very low, cryogenic temperatures, sometimes as low as 4 K, which is the temperature of liquid helium.…

In the AlGaN/GaN HEMT fabrication process, silicon nitride (Si3N4) passivation of the HEMT surface layer, which is typically AlGaN, is commonly used…

SUPREM-IV – Stanford University PRocEss Modeling Program was first released 30 years ago. Since then its descendants - Athena from Silvaco and…

2016년 9월 28일 | 3:00am-3:30am (한국 시각) 이번 시간에 LED와 OLED 소자의 통합 시뮬레이션 환경으로 개발된 Radiant를 소개하고, 뛰어난 효율과 색 품질,…

Semiconductor IP Community Joins Forces To Launch IP Tradeshow and Conference REUSE 2016 Event Focuses Exclusively on Fastest Growing Segment of the…

2016년 7월 27일 | 시각: 2:00am-2:30am (한국 시각) 실바코의 새로운 신뢰성 분석 툴, InVar Prime에 대한 개요를 제공합니다.

Introduction Bias Temperature Instability (BTI) [1] ranks among the most serious reliability issues in present-day semiconductor devices. In pMOSFETs, for instance, it…

Silvaco offers many alternatives for creating simple 3D structures, the optimum choice depending on what the user needs to simulate. Many of…

Traditionally, visualizing vectors by means of arrows in TonyPlot was a challenge, especially in the areas where the computational grid was dense.…

In a MOSFET structure, silicon carbide, 4H-SiC in particular, is known to exhibit lower channel mobility than Si, mainly due to Coulomb…

2016년 7월 1일 | 시각: 3:00am-3:30am (한국 시각) 이번 시간에 TCAD 시뮬레이션을 실행하는 GUI 툴, DeckBuild와 Virtual Wafer Fab에 대해 소개합니다.

Silvaco Expands Automotive IP Portfolio With Release of CAN FD Core Collaboration with NXP Semiconductor Provides Customers with Key Roadmap Technology for…

2016년 6월 24일 | 3:00am-3:30am (한국 시각) 이번 시간에 SiC, GaN, Ga2O3 전력 소자의 시뮬레이션을 소개합니다.

2016년 5월 25일 | 3:00am-3:30am (한국 시각) 이번 시간에 SiC, GaN, Ga2O3 전력 소자의 시뮬레이션을 소개합니다.

2016년 4월 29일 | 3:00am-3:30am (한국 시각) 이번 시간에 메모리 기술을 중심으로, 물리적 식각을 시뮬레이션하기 위한 방법, 메커니즘 및 모델을 소개합니다.

2016년 4월 15일 | 3:00am-3:30am (한국 시각) 이번 시간에 새로운 통합 3D TCAD 플랫폼을 소개하고, 수직 LOCOS 트랜지스터 및 멀티셀 IGBT 구조의…

A soft error in the context of this article, can be defined as an unintended change in electrical state of a device…

Q: What Types of 3D Delaunay Shape Refinement can be used in Victory Process? A. The Victory Process cell mode Delaunay 3D…

일시: 2016년 4월 1일 | 2:00am-2:30am (한국 시각) 실바코의 VarMan은 아날로그 셀, AMS/RF IC의 신속한 검사를 위해 혁신적인 몬테 카를로 기법을 제공합니다.…

2016년 3월 18일 | 2:00am-2:30am (한국 시각) OpenAccess 환경에서 실바코의 스키매틱 캡처 툴, Gateway 및 레이아웃 에디터, Expert에 대해 소개합니다.

It is very important to understand the operation and underlying physics of InGaN/GaN materials based electronic device in modern display industry such…

Victory Process can operate in either 1, 2 or 3-dimensions and can produce one of two different geometric representations: cell mode and…

The flat panel device for active matrix liquid crystal displays (AMLCDs) and active matrix organic light-emitting diode displays (AMOLEDs) has utilized a…

Q. How can I Crop and Slice using a non-convex mask during the export? Non-Convex Mask Polygons Non-Convex Mask Polygons Previous Victory…

2015년 12월 17일 | 3:00am-3:30am (한국 시각) 태양 전지 및 태양 전지 패널의 TCAD-to-SPICE 시뮬레이션 플로우와 이에 관련된 방법론에 대해 알아봅니다.

The solution of linear systems lies in the core of any TCAD simulation. On any nonlinear step of the computation a linear…

The NAND Flash memory cell has been refined to reduce the bit cost, but the limit of its miniaturization has been reached…

Organic light emitting diode (OLED) has been getting much attention over the past decades in the field of displays and lighting applications…

A power IGBT (Insulated Gate Bipolar Transistor) is conventionally made up of a repetitive array of homogenous IGBT cells. Such a homogenous…

Deckbuild supports variable substitution for both numerical and string variables using the SET statement and the $ symbol, thus allowing users to…

2015년 9월 30일 | 2:00am-2:30am (한국 시각) 실바코의 전력 무결성 및 신뢰성 분석 기능을 제공하는 InVar를 소개합니다.

In this article we will emphasize the new features and improvements of the DeckBuild 2 deck editing environment. We will start by…

As the design technology for power devices, such as MOSFET, GTO, and IGBT has matured, the importance of large domain 3D TCAD…

Liquid Crystals (LCs) are state of matter intermediate between that of a crystalline and a liquid. The optical, mechanical, electrical and magnetic…

The Victory Process conformal export is generated from the volume planes specified in a user deck. The accuracy and resolution of the…

2015년 5월 2일 | 2:00am-2:30am (한국 시각) 3D IC 설계의 자동적인 3D 공간 분할에 필요한 2가지 프로토타입 설계 소프트웨어와 3D 설계 규칙…

Device simulation helps users understand and depict the physical processes in a device and to make reliable predictions of the behavior of…

Among the many design criteria for solar cells, the design of the top metal contact impacts the cell efficiency. The areal density…

There is a constant demand to lower the on-state resistance of devices, improving their energy efficiency as well as increasing their current…

Victory Process supports mesh generation for device simulation using many common algorithms. The primary two are conformal and delaunay. A simple process…

2015년 3월 29일 | 2:00am-2:30am (한국 시각) 업계 표준 HiSIM_HV 2 모델을 사용하여, 고전압 소자를 위한 모델 파라미터 추출에 대해 소개합니다.

2015년 2월 18일 | 3:00am-3:30am (한국 시각) 이번 시간에 우주 또는 다른 높은 에너지 입자나 광원 근처의 방사선 환경에 노출되었을 때, 산화물…

The photovoltaics (PV) market represents the fastest growing renewable energy technology, with a 35% annual growth rate, which is projected to be…

VWF allows a curve as target for optimization. This feature greatly benefits the users who need to calibrate TCAD simulation against measured…

This document is a short guide on the new and existing support for export cropping/slicing in Victory Process cell mode. The cropping…

Background: Victory Process is packaged with a wide range of etch models. Victory Process also supports an “Open Modelling Interface” (OMI). The…

Irradiation by energetic particles can degrade semiconductor device performance. The particles involved can be electrons, positrons, neutrons, protons, alpha particles, heavy ions,…

A reversed biased PIN diode acts as a radiation event detector, sensing the occurrence of an ionizing radiation pulse, which is connected…

Two fundamental damage mechanisms take place when devices are exposed to particle fluences: ionization and lattice displacement or just displacement damage. Ionization…

The Simulation Standard article “Simulating Radiation-Induced Shifts in MOSFET Threshold Voltage”1 gives a brief overview of the ways that ionizing radiation can…

It is often not realized that more than one Single Event Upset (SEU) statement can be used in a simulation. Each SEU…

Single Event Burnout in a diode, requires a specific set of circumstances to occur, since there is no intrinsic current gain in…

The Victory Process cell mode Delaunay 3D device meshing algorithm already includes various TCAD-based local refinement algorithms to ensure accurate and robust…

Q: I have an SEU beam in a 2D structure; the beam track is at an angle through the device. I don’t…

Calculation of light extraction efficiency or optical output coupling efficiency is often needed in simulating a light emitting device (LED) such as…

Yes, TonyPlot has many various display and preference settings that users can adjust, transforming their simulation data into a high quality plot…

Silicon carbide is expected to be an excellent device material as high voltage and low-loss power devices. Recently, SBD (Schottky Barrier Diode)…

The main cause of operational degradation in MOS devices is believed to be due to the buildup of charge at the Silicon-Oxide…

2014년 3월 7일 | 3:00am-3:30am (한국 시각) 이번 시간에 비정질 실리콘 박막 트랜지스터 (a-Si TFT)에 관한 TCAD 시뮬레이션을 측정과 비교하는 보정 절차를…

일시: 2014년 12월 7일 | 3:00am-3:30am (한국 시각) TCAD와 SPICE 시뮬레이션으로 전력 소자의 성능을 설계, 시뮬레이션, 최적화하는 방법에 대해 논의합니다.

2014년 1월 7일 | 3:00am-3:30am (한국 시각) 이번 시간에 SEE (Single Event Effects)의 영향을 모델링하기 위한 방법과 소자 및 회로에 미치는 영향을…

A new feature that is introduced in Silvaco’s TCAD applications allows the user to run a parallel simulation on a cluster of…

A: The 2 basic commands needed to illuminate a structure in Victory Device are BEAM and SOLVE. A single (or multiple) BEAM statement(s) are specified containing the…

Wide-bandgap semiconductors such as SiC and GaN have attracted much attention because they are expected to break through the material limits of…

We demonstrate the modeling of optical response of exciton-polarons based on the well established Holstein Hamiltonian to model coupled exciton-phonon systems in…

When a wafer is clamped only at its edges and is heated with an infra-red source in a vacuum, the majority of…

Single-crystal gallium oxide (Ga2O3) has attracted increasing attention as a promising material for power device applications. It possesses excellent material properties and…

A methodology for simulating an edge emitting laser is demonstrated that incorporates a distributed Bragg Reflector (DBR) as one of the mirrors,…

A new class of high-voltage semiconductor devices, known as a reverse conducting IGBT (RC-IGBT), has emerged in recent years from research efforts…

In a 4H-SiC crystal, the stacking sequence of a Si-C bilayer plane extends along the crystallographic c-axis direction, also referred to as…

Interdigitated back contact silicon heterojunction (IBC-SHJ) combines the advantages of interdigitated back contact (IBC) and silicon heterojunction (SHJ) solar cells. Having all…

Silicon has long been the semiconductor of choice for high-voltage power electronics applications. However, wide-bandgap semiconductors such as SiC and GaN have…

Monte Carlo module of Athena allows accurate simulation of ion implantation in 4H-SiC and 6H-SiC [1]. It is known that channeling effects…

We demonstrate the capabilities of SILVACO TCAD tools for the design and simulation of intersubband GaAs/AlGaAs multiple quantum well infrared photodetectors. We…

In this article the various enhancements to the organic device modeling that have been implemented recently in Atlas are presented. Following the…

Fabrication of various nano-structures often requires mask controlled or patterned etching of materials. The chemical or wet etch methods cannot be used…

Silicon has long been the semiconductor of choice for high-voltage power electronics applications [1,2]. However, wide-bandgap semiconductors such as SiC have begun…

In this article we describe a technique to automatically calibrate parameters of an Ion Enhanced Chemical Etching model implemented in the 3D…

Different crystal planes of silicon are known to have different oxidation rates, e.g. the silicon plane with Miller indices is oxidized approximately…

The three-dimensional process simulator VICTORY Process now includes a semi-empirical model for the simulation of ion milling. During ion milling, the mill…

VICTORY Process is supplied with a wide range of models and data for an extensive set of materials, so that you can…

Accurate stress simulation has become a necessary part of performance and reliability analysis of semiconductor devices. In our previous paper [1] we…

Following the successful 3D simulation of the process flow of cantilever based MEMS switches using VICTORY Process is presented in August 2005…

The Gallium Nitride-based material family has fundamental material properties which make it an attractive candidate for semiconductor device fabrication. These properties include:…

This article demonstrates a new feature of TonyPlot3D. This feature enables the automated, syntax driven export of 2D structure slices from 3D…

Amorphous silicon Thin-Film Transistors (a-Si TFTs) are widely used as the switching device of liquid crystal display (LCD) technology. For development and…

Both flexible and touch panel displays have become popular for portable applications. To meet various functional requirements, system-on-panel (SOP) design has become…

In 1975, screen printing was first applied to solar cells for the formation of the front and rear contacts replacing expensive vacuum…

Single-photon counting detectors are used in a wide range of applications, including astronomy, optical communications, biological sensors, and military uses. Photomultiplier tubes…

In this paper, a two dimensional (2-D) generic model of quantum well light emitting diode (LED) based on ZnO, II-VI compound semiconductors…

To break through the material limits of Silicon and to realize the drastic performance improvement needed to meet the severe requirements in…

The analysis and characterization of stress effects have become an integral part of semiconductor technology and device design. In a typical semiconductor…

OLEDs have been researched for application in display devices due to their considerable advantages. In order to further improve and optimize devices…

Since lighting is estimated to account for 20% of the world’s electricity consumption, the search for reliable and efficient lighting technologies to…

The light source on short wavelenghts has been researched in GaN-based lser diodes (LDs). For high efficiency emitting devices, the wave-guide layer…

The addition of a chlorine species during thermal oxidation of silicon results in improved threshold stability, higher and more uniform oxide dielectric…

GaN heterojunction field effect transistors (HFETs) have been under extensive investigation because of their projected superb performances as high-power RF devices. The…

VICTORY Process is a tool for 3D simulation of the semiconductor industry’s technological processes. It allows stable and accurate modeling of the…

VICTORY Process is a 3D process simulation tool which allows for an accurate simulation of the doping distributions in semiconductor devices. It…

The photovoltaic industry has rapidly grown since 2000 and has diversified in technology how the solar cell are manufactured. As of 2010,…

It is often the case when simulating charged coupled devices (CCDs) or image sensors, that a designer wishes to know how many…

Anisotropic crystal etching is the common technique used in Micro Electromechanical systems (MEMS) manufacturing. It uses the property of some single crystal…

Developing ULSI silicon technology requires good control of dopant diffusion and minimizing defect formation during thermal oxidation. The use of high pressures…

SILVACO provides the tool ANSYSExporter which establishes the link between SILVACO software and ANSOFT ANSYS. ANSYSExporter is fully integrated within the SILVACO…

Organic light emitting diodes (OLEDs) have attracted great attention for full-color flat-panel displays since the demonstration of efficient electroluminescent devices [1]. Due…

In this paper, a physics based two dimensional (2-D) generic model of dual band mid wavelength and long wavelength infrared (MW-LW) photodetector…

Q. How do I convert a value from one set of units into another? A. Use the DBINTERNAL CONVERT.UNITS command.

Meshing for process in ATHENA or electrical characterisation in ATLAS is one of the biggest challenges that a user faces. Poor meshing…

VICTORY Process, the 3D process simulator now includes a module for plasma etching. The module is designed to simulate plasma etching processes…

The Silvaco C-Interpreter (SCI) allows convenient and flexible definition of physical models and material parameters via an ANSI standard C-language interface. The…

The degradation of MOSFET devices having relatively thin oxide layers is generally accepted as being mainly associated with the depassivation of silicon…

Virtual Wafer Fab’s powerful range of optimizers are used to investigate and minimise the coupled switching losses of a TCAD IGBT and…

VICTORY Process is a 3D process simulation tool which employs the LevelSet technique for manipulating and deforming structures. The structure’s geometry is…

The trap states at the interface of Silicon with Silicon Dioxide are usually divided conceptually into interface states and fixed oxide charges…

The Insulated Gate Bipolar Transistor (IGBT), is a power device that combines the high-power characteristics of bipolar transistors with the fast-switching and…

Silicon as a photonic medium has unique advantages in telecommunication systems. It is transparent in the range of optical telecommunications wavelength (1.3…

The problem of discretising the semiconductor drift-diffusion equations in the presence of a uniform magnetic field using the Box Method has previously…

This article describes a model for Resonant Tunneling Diodes (RTDs) implemented within ATLAS framework. The model is based on a self-consistent solution…

Solar cells manufactured from wafers of crystalline or polycrystalline silicon are today the dominant technology in the commercial market. Solar cells based…

The fully three-dimensional process simulator VICTORY PROCESS allows user to perform a wide range of manipulations of the structure’s geometry in order…

SOI MOSFETs can exhibit a kink in their Id/Vd curves, which is caused by impact ionization, floating potentials, and other effects. One…

Crosstalk is one of the main parameters that critically affect the resolution of detector arrays. It results in a reduction in image…

In modern semiconductor devices, the effects of physical lattice strain are playing an increasingly important role. One reason for this is that…

Texturing is often used to improve light trapping in thin film solar cells. The textured surfaces act to scatter the light in…

High Voltage Power Devices using super junction or multi RESURF effect have a relatively high BV with a drastic reduction in the…

Vertical LOCOS (VLOCOS) power MOSFET structures are becoming increasingly popular [1-3] for 100 V rated applications due to their high packing density,…

Solar cells are experiencing a surge in activity due to concerns about sustainability of non-renewable resources and the negative impacts of global…

One of the most important features of TCAD simulation is that the TCAD tools encapsulate the physics of the processes or devices…

The simulation of stress during device fabrication is becoming increasingly important and is often now deliberately introduced during fabrication to enhance device…

VICTORY DEVICE simulation framework includes tools for 1D, 2D and 3D simulation of modern semiconductor technologies. VICTORY DEVICE implements a full tetrahedral…

We show full 3-Dimensional (3D) electrical and optical simulation of a tunable silicon-based Photonic Crystal (PhC) Chromatic Dispersion Compensator (CDC) with high…

Semiconductor-Oxide-Nitride-Oxide-Semiconductor (SONOS) Non-Volatile memory structures can be simulated using ATLAS. The basic principle of these devices is the use of a charge…

Q: How can I get a CV curve of a MOSFET? And how can I get the current on all terminals? A:…

The formation of deep p- and n- wells using high-energy implantation has become an integral part of CMOS technology process flow. The…

The formation of isolation trenches is one of the key process steps used in power device fabrication. Also the intensive scaling of…

The ion milling process is used extensively in the Hard Disc Drive industry, particularly in the manufacture of thin film magnetic heads.…

GaN-based Hetero-Field Effect Transistors have been investigated in high power and high frequency electronics devices. However, such improved performance is still subject…

This paper presents research efforts conducted at the IESUPM in the development of an accurate, physically-based solar cell model using the general-purpose…

Introduction As MOS field-effect transistors are scaled down to a nanometer regime, quantum effects in both transverse and transport directions start playing…

Abstract The paper presents a new approach to three-dimensional semiconductor process simulation that overcomes the problem of moving boundaries and mesh generation.…

Introduction In recent years, the investigation of Organic Light Emitting Diodes (OLEDs) and photovoltaic devices based on small organic molecules and polymers…

1. Introduction Organic semiconductors have been incorporated in a wide range of devices, including organic thin-film transistors (OTFTs) and circuits, organic solar…

Abstract This paper is focused on the stability of n-channel laser-crystallized polysilicon thin-film transistors (TFTs) submitted to a hydrogenation process during the…

In this paper, the transient analysis of an AlGaN/GaN high-electron mobility transistor (HEMT) device is presented. Drain–current dispersion effects are investigated when…

Introduction The trend toward ultra-short gate length MOSFET requires a more and more effective control of the channel by the gate leading…

How Can I significantly Reduce Circuit Parasitics Netlist Extraction Time?

Introduction It is widely believed that the scaling of standard Flash devices will face in a near future several limitations, due to…

Abstract In this paper we present an original semi-analytical model for the subthreshold electrical behavior of complex 3D structures as the SOI…

Q. Is it possible to calculate the resistance components of a MOSFET (i.e. channel resistance, epi resistance, substrate resistance etc.) as a function…

Introduction The physical verification is becoming the most complex phase raised by the Deep SubMicron (DSM) technology. More than 50% of the…

Introduction The trend toward smaller MOSFET devices with thinner gate oxide and greater doping is resulting in the increased importance of quantum…

Introduction Erasable programmable read-only memory (EPROM) devices include amongst others, floating gate technology and SONOS (Polysilicon-Oxide-Nitride-Silicon) technology. Floating gate technology involves charge…

How to obtain a stable grid and smooth doping profile in non-planar a-Si TFT using Athena/Elite?

Abstract Improvement in temperature characteristics of GaN LEDs is important for realizing reliable devices operating at high temperatures. In this article, the…

Introduction By default STELLAR calculates the capacitances between interconnect lines and the whole substrate. In certain conditions it may lead to some inaccuracies. For…

1. Introduction Amorphous oxide semiconductor materials have attracted much attention as key components of TFTs for flexible electronics [1]. The advantages of…

Polarization-induced charges at the AlGaN/GaN interface of heterojunction field-effect transistors (HFETs) create a high density, two-dimensional electron gas (2DEG) in the channel.…

Interconnect parasitic effects play a very important role in modern integrated circuit design, especially for digital circuit. This article presents how a…

Introduction Power MOSFETs are widely used with an inductive load for S/W power supplies, DC-DC converters, and so on. But due to…

Introduction With the MOSFET gate lengths scaling down to sub-20nms many kinds of devices have been proposed and researched such as double-gate,…

Abstract The measured I-V curve from a ten period Si/SiGe MQW pin LED fabricated using a UHVCVD system is compared with ATLAS simulation results.…

A conventional 2 layer organic light emitting diode consists of a Hole Ttransport Layer (HTL) and an electron transport layer (ETL). A…

For various technological reasons, LEDs and as well as photo-voltaic devices frequently use PEDOT:PSS on top of ITO contacts as a hole…

Photolithography simulation is a very important part of TCAD. Accurate and predictive lithography simulation saves time and money spent on development and…

A new 3D electromagnetic simulator coupled with a statistical analysis, for inductance loop optimization is presented. It allows RF designers to easily…

How can I create a non planar structure using III-V materials for Device Analysis when the materials I want to use are…

Simulation capacities of GaInP solar cells were studied with a special emphasis on material and structural parameters. The comparison between experimental and…

Abstract: High-frequency simulations and characterizations of advanced metal-insulator-metal (MIM) capacitors with ultra thin 32 nm PECVD Si3N4 dielectric are presented. The frequency dependent…

How can I create a Design Of Experiments (DOE) using DeckBuild with one or more variables specified in a single input file when I…

Introduction The application of microelectromechanical systems (MEMS) to radio-frequency (RF)/microwave systems is on the verge of revolutionizing wireless communications, mainly in the…

Introduction In modern power devices, the total power loss comprises both a conductive power loss component and a capacitive loss component. As…

Introduction The Monte Carlo Implantation Module of ATHENA has proved to be a very accurate tool for simulation of various implantation processes. In this…

Is there a way to turn-off all of the generated layers so that the layout modifications can be done without them cluttering…

Expert features a powerful Netlist Driven Layout (NDL) function to assist the user in creating a layout. It increases the productivity of layout…

Expert Parametric Wire (Pwire) is a complex group of objects containing, a single wire named master wire, any number of subparts such as…

I am currently using ATLAS/ Blaze to model the electrical properties of an LED device that I am investigating. Is it possible to examine the…

Organic light emitting diodes (OLEDs) are attracting great interest in the display technology industry due to their promising low cost large area…

The persistent semiconductor technology trend of shrinking down device size requires development of veryaggressive technological setups consisting in high dose/low energy implants,…

The wiring tool in Expert automatically creates the shortest wire connecting two points specified by the user. The created wire goes around any existing…

Q. I have to send copies of my project layout to different members of my group, but they need to see only specific…

Introduction The functionality Silvaco’s Layou Editor, Expert, has recently been expanded with the new feature called Layout Versus Layout comparison (LVL). LVL is…

In deep submicron technology, conduction layers have widths much smaller than their thicknesses (see Figure 1). This makes edge parasitic capacitance effects…

The increasing demand of the TFT-LCD industry has lead to a rapid growth in display size and resolution. The higher cell packing…

Q: Can ATHENA get the STRESS in Compound Advanced material? A: The ATHENA STRESS command has been augmented to allow the 2 Dimensional stress distribution. To get the…

In certain cases, most notably in modern bipolar and SiGe HBT structures, epitaxial steps are performed after the oxide isolation structures have…

One of the most beneficial merits of computer-based experiment using TCAD lies in its capability of a total simulation of the target…

The modelling of concentrator solar cells for real conditions of operation inside optical concentrators is a subject almost untreated. Consequently, this work…

Q: How can I view a Foundry DRC run in Expert? A: Before a Foundry will start creating the masks to fabricate…

One of the strengths of Expert is to generate complex shaped layers such as spiral inductors, parabolic waveguides, etc. For the case of the…

Cross-Sectional Viewer is a tool in the Expert layout editor that simulates the cross-sections of ICs along an arbitrary drawn cut-line on the layout.…

A common technique for creating metal contacts is one known as a lift off. When performing a lift off process step, in…

In this communication we present a brief description of our initial results of transient simulation of InP/InGaAsP Fabry-Perot edge emitting laser diode…

This article will show how you can create LPE rule files using EXACT’s LISA scripting functionality. We will concentrate on generating a…

The high gain, and high gain-bandwidth product of the avalanche photodiodes is one of the key device for the long distance optical…

In the design of VLSI circuits the situations occur very often when a single schematic device is implemented in the layout by…

A novel simulation method of the steady-state of oscillators, based on Harmonic Balance (HB), is presented. A comparison with regular transient simulations…

During the elaboration of a Verilog-A model, debugging a module can be very useful for detecting non-physical behavior or fine-tuning the model. The SILVACO Verilog-A debugger…

If the MOS model file has the parameters: noia, noib, noic, Af, Kf and nlev=0 will SmartSpice ignore the BSIM III noise parameters (noia,…

EDIF has been a vital part of the Electronic Design Automation (EDA) industry for many years and Gateway allows users to convert…

Design of large scale chips requires precise knowledge of interconnect delays. However, detailed analysis of interconnects may quickly become computationally too expensive…

Single-Electron Transistors (SETs) [1][2] are attractive candidates for post-CMOS VLSI ICs. Accurate models are also required in order to efficiently design SET…

Hipex-NET is SILVACO’s powerfull hierarchical layout netlist extractor. Built-in extracting rules permit to make fast and accurate parameter extraction for basic set of…

How can I become a more efficient user of Expert?

In this paper the electrostatic impact of Channel Hot Electron (CHE) injection in discrete-trap memories is quantitatively addressed. The dual bit behavior…

This article presents a new approach to model the quantum confinement of carriers in MOSFET or heterostructure. SILVACO has already included in…

The subject of how to use the EXTRACT statement in DeckBuild often arises. The EXTRACT statement is a very useful tool for analysing data…

In certain cases, most notably in modern bipolar and SiGe HBT structures, epitaxial steps are performed after the oxide isolation structures have…

This article focuses on the use of Silvaco’s RFIC Design Suite including PDK, SmartSpice-RF, and Gateway.

HiSIM-1.2 parameter extraction methodology was discussed in detail in a previous issue of Silvaco Simulation Standard [1]. This article is meant to…

1. Introduction BSIM1, the first model of the BSIM series was released about ten years ago. Some major improvements have been made…

Customers are starting to use 64bit machines with large hard drives and Gigs of RAM and tend to forget the limitations imposed…

Expert’s Node Probing is powerful tool for inspection of netlist components on layout. It is designed for highlighting layout objects electrically connected…

Overview To extract parasitic capacitances from a circuit layout, you need to perform the following steps:

Expert layout editor version 4.0.1R has several new commands and functions released together with the new Qt GUI interface. Most of them are…

Q. Every time I create a new project or library, an empty cell with the same name is created in my project.…

SILVACO has recently released a new suite of interconnect analysis tools to meet the demands of state of the art cell, circuit…

On the cutting edge of LSI design, the accuracy of Layout Parasitic Extraction (LPE) tools is a critical issue to miniaturized LSI…

When solving for the static CV curve for a MOS capacitor, due to the absence of current carriers, convergence can be a…

Expert Parametric Wire (Pwire) is a complex group of objects containing, a single wire named master wire, any number of subparts such as…

Many users would like to extract SPICE models from their process and device simulation using Athena and Atlas to be used in…

For LCD and Memory designs, Array Copy function on Gateway is conveniently used. Users may want to align instances from specified instance…

A new Hierarchical Layout versus Schematic (HLVS) system that provides significant improvement in verification of huge circuits is described. Other of LVS…

Introduction One of the key components in many RF ICs applications is the inductor. It is very important that the inductor has…

Q: When I do an extract, the generated layers are present in the layout. If I need to do layout modifications I find…

Hipex-NET uses two techniques to calculate resistor values. First method of resistance extraction, which is usual for full chip netlist extractors and uses…

Introduction Mercury cadmium telluride (HgCdTe) is a semiconductor material whose material properties are adjustable through altering its constitutive molar fractions. HgCdTe has…

III-Nitrides have recently attracted attention as a promising material class for high-power, high-frequency microelectronic applications at elevated temperatures. They possess large band…

We describe here two approaches to model the quantum effects that can no more be neglected in actual and future devices. These…

To illustrate the use of this statement to find depletion widths we have used the standard MOSFET example mos1ex01.in to first create…

1. Introduction The Exact analysis stage extracts the user-required information necessary for the respective parasitic capacitances by probing the Exact database. This is performed via script…

Introduction In response to high demand, device designers are developing silica microlenslets that offer efficient coupling between optical fiber bundles and arrays…

A new parallelization method has been implemented into SmartSpice. Now .ALTERs can be destributed not only over several CPUs (by using -P option),…

In all previous versions of SmartSpice the model code (BSIM, diode etc.) was included in the one executable (SmartSpice ). This means any updates to…

The Verilog-A hardware description language opens many areas to SPICE users in the field of compact models, allowing manufacturers and universities to…

Stress effect models are now implemented in major models such as BSIM4 or HiSIM. The need for evermore accurate models with a…

Philips MOS20 was released in January 2004. Its purpose is to provide a high-voltage compact model to describe both operation of the…

Q: Sometimes I have problem to skip cells when importing cells with the same names from reference library. Once we skip one cell,…

1. Introduction This article begins a series of articles that describe the compatibility of Guardian DRC system[1] in terms of functionality: command set, syntax…

Expert schematic driven layout (SDL) is a CAD tool which increases the productivity of layout design by automating cell generation and providing visual…

1. Abstract Parameterized cells (P-cells) significantly increase the productivity of layout designers. Silvaco International’s tool Expert has been designed to aid layout designers through…

Introduction This article introduces the new features and numerical schema implemented in the most recent release of Clever from Silvaco. In this…

Q. Is there a way to automatically specify mesh spacing in ATHENA? A. Yes, there are three ways to automatically specify grid spacing. The most…

1. Introduction The topography simulation module, Elite has constantly been improved in order to simulate advanced processes, which are becoming more complex with device…

Polysilicon thin film transistors are attractive as active devices in driver circuits of highly integrated active-matrix liquid crystal displays (AMLCDs) and as…

The Input/Output Buffer Information Specification (IBIS) is a standard for electronic behavioral models based on I/V and V/T curve data. It is…

A powerful new feature “Stop-Continue” has been added to SmartSpice to allow the user to suspend a transient simulation and investigate the…

Silvaco has always supported the Solaris based Cadence design environment for seemless SmartSpice integration. To accommodate new customer demands to support the…

A new notation has been introduced into SmartSpice to allow a compact expression of a multiple bit wire buss to be used.…

Netlist extraction and the quality of netlist extraction is becoming of increasing concern for integrated circuit design flow. As circuits become more…

HIPEX-R is part of HIPEX software package for physical verification of multimillion transistor designs. It is a hierarchical full chip parasitic resistance…

SILVACO is releasing its new layout parameter extractor: HIPEX-NET. The new tool will replace Silvaco’s Maverick, which is a part of Guardian…

In previous versions of Guardian DRC there were only two ways of measuring the distance between two segments: the ordinary, Euclidean metric,…

Q: I would like to highlight two nodes at the same time in Expert. I currently use Verification->Node Probing->Pick Node to highlight…

Spreading Resistance Profiling (SRP) retains its popularity in the semiconductor industry by an inexpensive means of capturing dopant profile information. However, device…

An eye diagram is a convenient way to visualise how the waveforms used to send multiple bits of data can potentially lead…

An effective device structure for reducing leakage current in BH laser diodes with semiin-sulation doped Fe in InP blocking layers has been…

Mocasim is an advanced three-valley Monte Carlo simulator designed to generate the transport parameters used in Silvaco’s physical device simulators. It accurately…

Q: EXACT has powerful scripting utilities for manipulating the final capacitance data and variables but is there an easier graphical front end…

HiSIM (Hiroshima university STARC IGFET Model) is one of the surface potential based Spice models [1], [2] and pioneered the iterative approach…

There are several ways to account for the effect of STI-induced stress in standard compact models. The purpose of this article is…

In this article, we describe practical behavioral modeling for highly non-linear circuits using Verilog-A, which is analog extension of Verilog-AMS. At first,…

Q. My simulation fails because SmartSpice cannot find a binned model, what does this mean?

HIPEX-Net is a hierarchical layout extractor. It can create both hierarchical and flat SPICE formatted netlists of the extracted layout. HIPEX-Net also…

There is the recent improvement in Expert Layout Editor, the “Shortest path” option was added to Flight line styles (Net Bar). This…

This article presents an overview of new features added to Silvaco's Expert layout editor. Silvaco has taken a careful look at the…

Recent versions of Guardian DRC introduce operations that involve edge layers, either on input or on output. An edge layer is a layer…

We introduce a platform-independent version of Guardian LVS. An important feature of any tool is its capability to operate on various platforms…

Q: I have some trouble counting the number of in-stances in a layout using Expert. I have tried to use the Chip…

The application of Super Junction concepts to a low voltage power MOSFET is investigated. The body junction is modified with the addition…

Silvaco’s Binary Collision Approximation (BCA) Monte- Carlo Implantation simulator closely replicates the physics of implantation by individually tracking implanted ions and their…

This article will present two different ways to extract parasitics from an IC design: first using a full chip extraction tool HIPEX-RC…

Q: Can ATLAS simulate an SEU event in 2D? To simulate a single event upset (SEU) is inherently a 3D problem because…

RPI VCSEL model was developed by Professor Michael Shur and his team from the Rensselaer Polytechnic Institute (RPI) [1]. A release of…

Berkeley University BSIM3v3 model is the industry-standard, physics-based, deep-submicron MOSFET model for digital and analog circuit designs. This makes BSIM3v3 model a…

Normally a single active device model is extracted to cover a range of device geometries and temperature. Sometimes this single scalable model…

When you run a long simulation time analysis the evaluated time points are normally all held in memory until the end time…

Guardian LVS from Silvaco is an efficient, reliable, and diverse package that brings the benefit of high-speed verification to PC-based test environments.…

Silvaco’s Guardian LVS tool compares two circuits that are defined by their netlists. The comparison is based strictly on the topological structure…

I generated some layers in Expert by DRC script run, and after that, derived layers can not be cleaned by "Tools\Derived Layers\Clean…

Recent years has seen rapid acceleration in the research and development of organic thin film transistors (OTFTs) as key components for active…

Exact2 from Silvaco is a sophisticated, physically-based simulation tool for calculating semiconductor interconnect capacitance values. Its purpose is to build a capacitance…

This article addresses the creation of semiconductor laser double heterostructures, and the subsequent simulation of laser output with DevEdit from Silvaco. A…

Computer simulation is used extensively to verify physical phenomena in semiconductor devices. Meshing plays an essential role in obtaining good simulation results.…

ATHENA’s Optolith module is designed to simulate the 3 basic lithography technologies; contact printing, proximity and projection lithography. The imaging calculations within…

This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical…

This article focusses on the use of Silvaco International’s schematic capture and editing tool Scholar combined with Verilog A. Verilog A is…

This simulation standard will discuss Silvaco International’s post processing application SmartView and will highlight features that identifying it as an important tool…

The transient simulation uses an adaptive time-stepping algorithm depending on the change in the circuit waveforms (dV/dT). This means the simulated waveform…

DRC Guard Performs "real-time" DRC on Expert Layout Editor. DRC Guard’s real-time design rule check (DRC) verifies entered or modified objects after the…

Silvaco’s Expert tool is an extremely powerful layout-editing tool that supports features related to parameterized cells. Parameterized cells, often called P-cells, increase…

The article "Connectivity options for DRC spacing check operations in Guardian" (Simulation Standard, vol. 11, no. 12) [1] describes layout netlist connectivity…

We have lots of cells that become off-grid when we do cut-and-paste from other cells. We tried to use the "Tools->Snap Selected…

A great deal of recent industry attention has focused on the use of non-planar multi-gate device structures in future generation MOS devices…

In order to investigate the influence of ridge separation on the transverse optical modes of a double ridge edge multiple quantum well…

The trend toward smaller MOSFET devices with thinner gate oxide and greater doping is resulting in the increased importance of quantum mechanical…

It is possible to now create new heterojunction and double heterojunction bipolar transistors [2] utilizing junction layers made of different heterojunction semiconductor…

When an implant occurs there will be some level of damage to the crystal structure of the silicon. If this damage is…

Implementation of a new ferroelectric capacitance model from Ramtron International Corporation into SmartSpice was first described in the April 2002 issue of…

Version 7.0 of the University of Florida Silicon-On-Insulator (UFSOI), released in 2002, is now available with Silvaco SmartSpice by setting LEVEL to…

Silvaco SmartSpice simulation results are typically stored in RAM. Since transient simulations of large circuits often exceed 1GB, a large swap-space partition…

One of the methods to define a Voltage Controlled Oscillator (VCO) in a SPICE simulation is to make use of a voltage-controlled…

Level=36 RPI poly-Si TFT and other original TFT models do not support automatic geometry binning. The enhanced model included with SmartSpice 1.9.7.C…

Silvaco Expert is an extremely powerful layout-editing tool that supports features related to parameterized cells. Parameterized cells, often called P-cells, increase designer…

Modern complex circuit designs require automatic router functionality in circuit layout editors. In multi-layer hierarchical design, it is often necessary to build…

The C++ interface for Silvaco’s Expert layout tool, is now an exclusive customization language that expands the tool’s handling of high-level customization,…

After I create my round curve and run a DRC check on my design, it comes up with hundreds of errors associated…

The silicon germanium heterojunction bipolar transistor (SiGe HBT) is a promising technology for combining the operating speed of compound material devices with…

A new feature has been added to Silvaco's device simulator ATLAS, which allows the simulation of ohmic heating effects in metals using…

Impact ionization plays an important role in the design of many semiconductor devices. Since impact ionization is both temperature and electric field…

ATLAS may be used to study these effects. A standard experiment for studying recombination in silicon is the transient decay of photoexcited…

BSIM3SOI version 3.0 model was released on May 2002 by UC Berkeley. This model includes both Partially and Fully depleted models. This…

HiSIM is based on a charge-sheet model. IDS current is described using only one equation, and there-fore is continuous over the whole…

HiSIM is a MOSFET model for SPICE circuit simulation that has been developed by Hiroshima University and STARC Company. This model present several…

The input impedence of most network analyzers are around 1 MOhm, which is relatively small. Due to this low impedence the leakage…

A new version of Savage DRC system taps the full power of multiprocessor computers by introducing simultaneous execution of DRC commands from…

Silvaco Data Systems announces the release of CELEBRITY CAD suite: Expert layout editor, Savage DRC system and Guardian LVS for Linux platform.

It is well-known that parasitic effects are no longer negligible for modern integrated circuit technology. Among the most important parasitic effects limiting…

To provide uniform etching of metal, dummy metal rectangles can be placed over an unused area of the chip. The following script…

Q:  How can I cut exactly the same hole in many layers? Q: How to skip a single layer during stream-out? Q:…

In this contribution we present a model for transient enhanced diffusion of boron in silicon. This model is based on the usual…

Interest continues to grow in the development of high electron mobility transistor (HEMT) technologies for micrometer and millimeter wave power applications. A…

This article presents a standard case of transmission line: the microstrip structure. First, the structure is described and then the results extracted…

ATLAS allows the user to define a contact with a number of different boundary conditions; ohmic, Schottky, current controlled, floating or reflecting. The…

We give in this article an introduction to the Verilog-A SmartSpice interface. This new feature in SmartSpice allows the user to write…

Ramtron International Corporation has developed a ferroelectric capacitance model with a new concept of double distributions of domain reversal voltages.

Acknowledging the need for more flexibility, SmartSpice now provides three numerical methods for linear system solution. The additional solvers provide for greater…

The BSIM4 model provides a RF CMOS modeling capability. Prior to the BSIM4 model the RF modeling was accomplished by using macro…

It is well known that analyzing LVS reports is often a difficult and brain-teasing task because the "global" nature of connectivity. Unlike…

Antenna rules is a common name for rules that check ratios of amounts of material in two layers from the same node.…

Expert API is intended for customizing and extending the existing software functionality by functions written by the users of Expert using C/C++.

A simple way to add custom commands to Expert's menu is implemented. It is possible to add menu items that execute xi-commands…

We analyze quantitatively the real impact of technology on the needed level for carrier transport modeling. The results, based on theoretical analyses,…

Signals propagated in actual and future IC's interconnections are spreading, in terms of spectrum frequency, from DC to microwave domain because of…

The Gate-All-Around SOI transistor [1], in which the gate oxide and the gate electrode are wrapped around the semiconductor region between the…

Installing and using Silvaco TCAD tools on a Windows 2000 Machine Introduction Silvaco software supports licensing on Windows NT (Serverice Pack 4.…

The Modella lateral PNP bipolar model was  developed by Philips Electronics N.V. and first released to the public domain in 1990 [1,2].…

So far the BSIM3v3.2 MOSFET model, developed by UC-Berkeley, has been considered as the industry standard model for deep-submicron CMOS design. It…

Optimization is the task of finding the absolute best set of admissible conditions to achieve your objective, formulated in mathematical terms. The…

The BSIM4_FI routine in UTMOST III MOS module should be used for data collection and BSIM4 SPICE model parameter extraction. The BSIM4_FI…

An IC layout has to satisfy many technological design requirements. One of these is spacing, i.e., a layout object has to be…

Most of recent improvements in Expert, Savage, Guardian and Maverick are aimed at the enhancement of the usability of these tools. All…

Virtually all latest and prospective enhancements of Expert Layout processor (for example, semi-automatic floorplanning) are based on sophisticated geometrical models. In some…

If I try to close a project, Expert gives me a prompt: "Save changes in a project?", but I remember that I…

The low temperature operation of many device structures has been shown as an effective method for improving device performance without reducing device…

This article will present the simulation methodology of a self-aligned double-gate MOSFET structure (FinFET) using SILVACO 3-D simulation suite. The double-gate MOSFET…

We analyze quantitatively the real impact of technology on the needed level for carrier transport modeling. The results, based on theoretical analyzes,…

The Atlas syntax is flexible enough to allow the definition of sinusoidal nodal voltages by defining them on the SOLVE statement line.…

This article presents a high frequency SPICE model parameter extraction method for CMOS devices. Current compact MOS models are developed for low…

New improvements have been added to Shur a-Si:H and Poly-Si Thin Film Transistors models. These enhancements include self-heating effect and a new…

This routine is a multitarget/geometry routine used to extract all kind of characteristics. There is the possibility to trace three different targets.…

For the UTMOST III versions greater than 17.2.0.R, the UTMOST users can measure the CJSWG (CJGATE) capacitance using the "CJ/CJSW" routine. The…

Cross-Sectional Viewer is a tool within Expert to simulate the cross sectional view of ICs along an arbitrary drawn cut-line on the layout. Cross-sectional Viewer is a…

The functionality of several features of Expert layout editor has been enhanced to deal with hierarchical layouts in more convenient ways.

An important step in electronic circuit design is layout versus schematic verification (LVS)

Q: Often I need to measure big objects. It order to position the ruler precisely I must zoom in at one end,…

In previous Simulation Standard articles (Nov 97 & Nov 98) FastBlaze has been presented as a new, highly efficient approach to simulating…

Predictive and efficient lithography simulation is an important component of the semiconductor industry efforts to develop the next generation of deep submicron…

In a Research & Development environment, Technology Computer Aided Design (TCAD) is involved in the device optimization loop and requires efficient and…

 Yes. ATLAS now supports a wide range of materials in its database. This database covers single element conductors, binary compounds and quaternary compounds. A…

In this paper, I have used the same technique to model uni-directional HV MOS devices as previously reported for bi-directional HV MOS…

RF MOSFET Small - Signal Model and Parameters Small-signal equivalent circuit of MOSFET after de-embedding parasitics is shown in Figure 1 and…

SOI technology appears now to have become an advantageous, viable option for low-voltage and high-performance CMOS integrated circuits in digital, analog, and…

Q: To simplify netlist extraction, I specify one kind of diffusion resistors in my layout by means of a special resistor definition layer.…

A parameterized cell (P-Cell) is a cell with user-specified parameters. It is possible to create customized p-cell instances with different composition according…

Dragon DRC is a new advanced hierarchical DRC system. The design principles this system is based on are carefully selected to ensure that Dragon DRC…

The latest release of Layout versus Schematic tools from CELEBRITY CAD suite (Maverick full-chip parametric netlist extractor and Guardian hierarchical netlist comparator) delivers a number of significant…

The DVCS subsystem of CELEBRITY CAD suite provides significant improvement in management of complex designs, design reuse and teamwork management. The most important features…

Q. When I simulate my process flow the simulated profile is always lower than the SRP measurements. What could be causing this? A.…

The rapid evolution of modern photonic devices in digital photographic and detection systems creates a need for physically-based simulation of charge collection…

This article will present an efficient and original methodology for global and predictive modeling of low energy Boron, BF2 and Arsenic ion…

A primary use of QUEST is intended to be for extracting frequency dependent transmission line models for use in SPICE circuit simulations. The generation…

Q. How can I extract VBIC bipolar model parameters using UTMOST III? A. UTMOST III Bipolar module can be utilized to extract and optimize the VBIC…

With the advent of ever increasing operation frequencies, Silvaco is introducing a new high frequency model for MOSFETs that will be implemented…

Until now, SmartSpice has supported the TriQuint model designated TOM using the Level=5 model parameter. SmartSpice now supports the TriQuint-2 MESFET model designated TOM-2. This model…

The University of Florida SOI Group first released version 5.0 of UFSOI model in August 1999 and then in November 1999. To…

Q: Usually, when I want to change the display of a drawing in the Drawing window, I select the Window pull-down menu in…

One of the most useful features of the Scholar schematic capture is tight integration with the SmartSpice simulator. In effect, Scholar makes it possible to automatically generate SmartSpice netlist on…

One of the main features of modern complex Computer-Aided Design Systems is the ability to support the communication between concurrently executing applications…

Q. How can I ensure that the vertical Y.MESH spacing in my process simulation is adequate for my particular implant condition? A. A good…

FastBlaze is an ultra-fast physical MESFET and HEMT simulator which incorporates advanced physical models. By designing the simulator and its framework specifically for…

For high temperature, high power applications Silicon Carbide (SiC) continues to be a useful material for device fabrication because of its wide…

The Monte Carlo Binary Collision Algorithm (BCA) implant module in ATHENA was introduced in an earlier article [Simulation Standard Vol 10, #5, May 1999]…

A. UTMOST III SOI module has three routines for characterization of the parasitic BJTs of SOI devices. These routines are "IC/VCE", "Gummel" and "INT_BJT"…

The latest VBIC bipolar model v1.2 of Sep 24 1999 has been integrated into SmartSpice and UTMOST III. It can be invoked by specifying the model…

A novel extraction method of high frequency small-signal model parameters for MOSFET is proposed. From S-parameter measurement, this technique accurately extracts the…

Q: I tried to resize shapes using the DRC command and observed thin "cracks" appeared for polygons with holes (see the left shape…

In our previous publication ("Scholar: An Enhanced Multi-Platform Schematic Capture", Simulation Standard, Vol.10, Number 9, September 1999) we presented the main features of a…

A: ATLAS/S-Pisces and ATLAS/Blaze both have a small signal ac analysis capability built into them. This analysis is based upon the work of S.Laux [1] and…

Thyristors are semiconductor devices that exhibit multi-stable or bi-stable electrical characteristics, and can be switched between a high-impedance OFF state and a…

Ever decreasing minimum geometries in MOSFET design results in a corresponding reduction in the thickness of the gate oxide. This is an…

With the continuing emergence of optical technologies, optoelectronic device structures are becoming increasingly important for modern telecommunications and data network applications. Like…

SOI technology for state of the art CMOS technology is rapidly approaching maturity. PD-SOI device design has the advantage of easier manufacturing…

A. It is likely that there may be some contact problems or defected devices during the data collection. This problem can occur when…

New improvements have been added to Shur models. These enhancements include a self-heating effect and a new charge conservative model.

The Berkeley BSIM3SOI version 2.1 models, released in September 1999, have been implemented in SmartSpice. The three new models are selected according to…

Q: How can I cut exactly the same hole in many layers? A: There are at least two ways to do this.…

One of the main features of modern complex CAD systems consists in the ability to support the schematic capture function that provides…

A: Modeling of the increase in breakdown voltage at elevated temperatures requires a model to describe the temperature dependence of the impact ionization…

The recent advances in PC hardware capability in terms of memory and CPU floating point performance has allowed the possibility of running…

In order to simulate heterojunction devices accurately, both the thermionic emission and tunneling mechanisms must be considered when calculating transport across hetrojunctions.…

EXACT is a sophisticated interconnect characterization tool integrated into the DISCOVERY framework. It is designed to build the capacitance coefficient database required by any Layout…

The "Binning" routine in UTMOST III MOS module has been greatly enhanced. The bin models can be generated much faster and the routine requires…

Silvaco now offers the MOS31 JFET/MOSFET model originally developed by Philips [1] as part of the SmartLib product-independent model library. This model is available…

Bulk CMOS is currently the dominant technology for VLSI integrated circuits but its scaling constraints pose ever greater as device geometries shrink.…

A. Previous articles in the Simulation Standard have highlighted the diffusion models required for accurate simulation of shallow source/drain junction formation[1] and…

Q: I want to draw several long wires, with precise positioning of both ends. I am used to doing this as follows:

Maverick is a sophisticated full chip hierarchical netlist extractor [1]. It augments the existing CELEBRITY framework which includes state-of-the-art software for VLSI layout editing, hierarchical…

In a previous issue of Simulation Standard for Process and Device Engineers[1] the simulation of a three stage CMOS ring oscillator using ATLAS/MixedMode was…

There has been a significant increase in the popularity of liquid crystal displays with control circuitry being placed on to the glass…

ATHENA version 5.0 includes a new Binary Collision Algorithm (BCA) for accurate Monte-Carlo implant modeling down to sub-1keV energies. This new BCA code…

A. The BSIM3_MG routine in SOI module of UTMOST III can be used to extract SOI model parameters. The SOI BSIM3_MG routine operation is similar…

The addition of important features in the latest version of SPAYN (1.7.3.R) makes it an even more useful and versatile statistical parameter and yield…

Users of the Cadence Design Framework II (DFII, versions 4.4.0 and above) have been enjoying a tight integration between SmartSpice and the Analog Artist…

The intrinsic capacitance parameter extraction routine (INTCAP) is in the CAP analysis section of the UTMOST III MOS module (Routine#67). The INTCAP routine has…

Q: I often use the temporary reference point, but I would like to see both absolute coordinates and relative coordinates, without toggling the…

This paper concerns the problem of determining optimal placement of rectangular blocks within a rectangular area known as the packing or cutting-stock…

Guardian is a (state-of-the-art) hierarchical netlist comparison system, which eliminates many of the disadvantages of existing programs. Running on PCs under Windows NT,…

This article presents Single Event Upset (SEU) simulation of a SRAM cell using MixedMode3D. MixedMode3D provides the capability to simultaneously perform circuit simulation coupled…

A new diffusion algorithm based on a Galerkin method with linear finite elements, an extremely fast sparse matrix solver, and object oriented…

A. Typically, UTMOST III s-parameter module is used to measure the FT versus IC (collector current) characteristic of bipolar transistors. The FT_CE routine can also…

Several enhancements have been made to the TFT models in SmartSpice. New parameters have been added to improve accuracy and allow simular sophisticated modeling…

When performing statistical analyses it is often necessary to compute transformations of the observed data. This transformation may only involve a single…

General purpose dichotomic search method is often requested by designers when they want to find a specific element (voltage, current, parameter value…

Philips Level 9 model is widely used as an accurate deep submicron CMOS model. The model is physical, and as such lands…

Q: I took the example file mux4.gds from Expert's installation and tried the Edit-in-place operation. I entered into an instance of mux1,…

This article introduces the LISA (Language for Interfacing Silvaco Applications) command language and gives an overview of LISA features.

The Expert layout processor v.2.0 introduces a client-server system for managing large projects in multiuser design environments. This system is a significant improvement and…

Q: How can anti-reflective coatings be modeled when simulating photodetectors in ATLAS/Luminous? How can detection efficiency be plotted?A: Earlier version of ATLAS were able to handle…

In our earlier paper [1] a new Binary Collision Approximation (BCA) module was described. It was shown that models and algorithms implemented…

A common request from TCAD (Technology Computer Aided Design) users is advise on how to calibrate the process flow and device simulator…

FastBlaze uses novel device simulation techniques to simulate typical MESFET and HEMT characteristics in less than a minute. To be a truly useful…

CLEVER can perform accurate field solver extractions of resistance and capacitance from 3D structures generated from realistic process simulation. Comparison of CLEVER results with measurements…

The HP4155/56 DC Analyzer can be configured with SMU and Pulse Generator expander box frame called HP41501A. The expander box can have…

An important aspect of statistical process control in IC production is the ability to predict circuit performance variation in the manufacturing process.…

The debut of Silvaco's new schematic editor, Scholar, is drawing closer. Scholar is a sophisticated design tool which derives its power and flexibility from the…

In collaboration with STMicroelectronics Central R&D at Crolles (France), a new routine has been developed in UTMOST III to provide a complete solution for…

The .ALTER statement is designed to allow a SPICE input deck to be re-run with a change in a single parameter. This feature is…

I run DRC, find one-two violations, correct them, then I re-run DRC to check whether my corrections worked. However re-running on the…

Rectangular partitionings form a mathematical base for many modern approaches to automation of VLSI design [1-3]. In particular, popular methodologies of hierarchical…

In this paper we introduce one of the latest and most advanced features of Silvaco's Expert Layout processor for Windows NT ­ DRC Guard.…

When using the analytical implant tables in ATHENA the default model for the lateral implant range assumes a gaussian profile with a standard deviation…

The shrinking critical dimensions of modern technology place a heavy requirement on optimizing the etching of narrow mask opening. In addition the…

The ATLAS device simulation framework has been to improve the analysis the large signal transient behavior. These features include a simple specification for single…

CLEVER is designed to model interconnect parasitics by simulating the back end processing steps of custom cells in three dimensions. A 3D process…

The traditional Noise models in SPICE used two parameters (AF and KF) to model the noise level and the frequency dependency of…

Following the log file conversion tool for TonyPlot introduced with UTMOST 12.3.14.R1, new file formats have been added to UTMOST III's printing and plotting options to make…

The latest Berkeley BSIM3v3.2 model of June 16 1998 has been integrated into SmartSpice 1.5.5. The Silvaco implementation of the Berkeley BSIM3v3.2 model can…

Silvaco now offers the EKV (ENZ, KRUMMENACHER, VITTOZ) MOSFET model version 2.6 originally developed in EPFL ("Ecole Polytechnique Federale de Lausanne" -…

The latest Berkeley BSIM3v3.2 model of June 16 1998 is now available in the SmartSpice 1.5.5 release. Two BSIM3v3.2 implementations are supported…

Q: Can I draw tangents to circles in EXPERT? A: Expert supports several options for drawing sophisticated shapes. There are three ways to accomplish…

Placement and routing problems for integrated circuits are inherently interrelated and extremely complex from the algorithmic point of view. This complexity grows…

Maverick is a modern hierarchical netlist extractor, providing extraordinary efficiency as well as comprehensive features and ease of use. It runs on…

How can anti-reflective coatings be modeled when simulating photodetectors in ATLAS/Luminous? How can detection efficiency be plotted?

This article focuses on the effects of process and modeling parameters on device electrical characteristics and uses the threshold voltage versus gate…

Mixed-signal systems-on-a-chip (SOC) integration of digital, analog, RF, and power components is emerging to meet demands for low-power, highly integrated systems in…

FastBlaze is a fast physical device simulator for MESFETs and HEMTs optimized to provide interactive TCAD for modern III-V FET devices. It…

Q. What is the typical method of measuring flicker noise using S3245A Noise Amplifier?

The importance of the MOS device SPICE model validation and the introduction of the validation routine in UTMOST III was presented in…

A new feature has recently been added to UTMOST: the ability to convert UTMOST log files into a format suitable for viewing in TonyPlot. This new…

In a previous article [1], the efficient use of the SmartSpice .MODIF statement for cell characterization was discussed. This article will focus on using advanced…

Thin film transistors (TFTs) have an important application in the manufacture of active matrix LCD displays. As this technology has become more…

The SmartSpice Interface to Cadence integrates the Analog Artist and Composer elements of the Cadence Design Framework II (DFII) with SmartSpice. This integration is accomplished,…

Ring oscillator circuits are a valuable test structure for determining the feasibility and success of an integrated circuit process fabrication sequence. One…

The Berkeley BSIM3SOI model, released in December 1997, is now available within SmartSpice as the MOSFET level=25 model. This model incorporates three separate implementations:…

The paper describes a generalization of the scanline approach [1] to reconstruction of the shape of planar object represented by a discrete…

This article describes a method of reporting DRC errors implemented in Savage, applicable to multi-million transistor layouts. The method of hierarchical information inheritance…

One of the most challenging and time consuming tasks in VLSI design automation is Layout Versus Schematic (LVS). The problem is to…

Q: Is it possible to perform a DRC check on portions rather than on the whole circuit useful when only 2 or 3…

Recent additions to the ATLAS device simulation framework have added the ability to simulate 3D electrothermal effects in Giga3D and mixed circuit…

With mounting concern for energy conservation and nature preservation, power electronics is becoming increasingly dominant in everyday life.

It is usually assumed that the poly gate in a MOSFET is doped at a concentration such that depletion in the gate…

Mesh control in process simulators is one of the major issues tackled by any user. Over the years the meshing algorithms with SSuprem4 and ATHENA have…

Q: How can external tools be run inside of Silvaco's run-time environment DeckBuild? Is it possible to include UNIX commands along with simulator…

The SmartSpice interface to the Cadence Design Framework II has been substantially improved in its latest release (version 1.0.8.R), following feedback from…

Taveren Technology, Inc., a startup company based in Austin, Texas is busy developing the next generation performance characterization tool suite.

SmartSpice provides many unique and powerful features to facilitate parametric analysis in general and cell characterization in particular.

The BSIM3v3.1 SPICE model has become an industry standard for modeling deep-submicron MOS technologies. The model is suitable for both digital and…

Q: What is typical measurement set-up for the S3245A Noise Amplifier and what measurement equipment is used? A: Typical Measurement Set-Up