Design IP: Production-Ready Offerings for Production-Ready SoCs
Production-Ready Offerings (PRO IP) for SoC designs, characterized for specific foundry processes and available to license now: Mixel mixed-signal interface IP, standard cell libraries, memory compilers, AMBA, I3C and automotive networking IP
Don't see what you need? Talk to the IP team.
Why license PRO IP
Most of a chip is built on standards: interfaces like MIPI, I3C and AMBA, and
building blocks like standard cells and memory compilers. Designing them in-house takes
design, verification and foundry characterization but rarely sets a chip apart. PRO
IP lets your team spend that effort where it does.
Time to market
PRO IP is characterized for specific foundry processes and delivered with the views your flow needs, so integration starts right away instead of after a block development cycle.
Lower risk
Focus where it matters
Find the IP for your design
PRO IP covers interface, foundation and system IP. Coverage by foundry and node differs by product line, and the table below lists it for each one.
Mixel interface IP
Foundation and system IP
Libraries and compilers characterized per foundry process, plus synthesizable cores for the logic that ties them together.
Foundation IP
Foundation LVDS I/O is transmitter and receiver cells at the pad, for the I/O ring. The Mixel LVDS PHY is a separate product for display links.
AMBA IP cores and subsystems
Automotive networking IP
Mixel automotive PHYs: ASIL-B D-PHY, ASA Motion Link.
I3C interface
Silvaco IP outside PRO IP
Embedded processors
The M8051EW for low-power 8-bit control, and ColdFire V1, V2 and V4 at 32 bits, as cores or full processor platforms.
Power management
Two LDO regulators, rated 30 mA and 250 mA, with outputs adjustable from 0.45 to 0.9 V. A 0.45 V bandgap reference completes the set. All three run on TSMC N3P.
Other IP
An IEEE 1149.7 TAP controller: JTAG debug over two pins, with shorter scan times.
IP management
Software that tracks the IP you license, the IP you build, and where each one ends up.
IP Grid
IPVault is where your IP lives: cataloged, stored and handed out, with support tickets and license records alongside. IPAudit tells you which IP sits inside a given SoC design.
Xena IP Management
One record for the business and engineering sides of your IP. Xena keeps an enterprise catalog, locks release versions and ties access to license terms.
Check your foundry and node
AMBA, I3C and the automotive networking controllers are soft IP, synthesized onto whatever node you choose. Hard IP is
characterized per process, which makes your foundry and node the first filter.
| PRODUCT LINE | FOUNDRIES | PROCESS NODES | LINK |
|---|---|---|---|
| C-PHY/D-PHY combo Mixel IP | TSMC, STMicroelectronics | 2 nm to 65 nm | View Now |
| D-PHY Mixel IP | TSMC, GlobalFoundries, Samsung, SMIC, Tower, UMC | 7 nm to 90 nm | View Now |
| C-PHY Mixel IP | TSMC | 22 nm and 40 nm | View Now |
| M-PHY Mixel IP | TSMC | 40 nm | View Now |
| LVDS/D-PHY combo Mixel IP | GlobalFoundries, TSMC, Tower | 22 nm to 65 nm | View Now |
| LVDS Mixel IP | TSMC, UMC | 40 nm | View Now |
| ASA Motion Link Mixel IP | TSMC | 22 nm | View Now |
| Standard cell libraries Foundation IP | TSMC, GlobalFoundries, UMC | 28 nm to 180 nm | View Now |
| Memory compilers Foundation IP | TSMC, GlobalFoundries, UMC | 22 nm to 130 nm | View Now |
Don’t see your foundry or node? More IP is in active development and may meet your needs. Talk to the IP team. Memory compilers can be characterized to custom PVT corners on request.
Proof and Resources
13 nodes, 9 foundries
Silicon-proven Mixel IP.
1 billion+
units shipped with Silvaco automotive networking controllers
ISO 26262, ASIL-B
Automotive IP for ASIL-B applications, with ISO 26262 functional safety support across MIPI, ASA and CAN.
Liberty, LEF, GDSII
Fully characterized, DRC/LVS-clean instances with Liberty, LEF and GDSII views.
ISO 9001
Certified quality management across Silvaco TCAD, EDA and IP products.
Customer · Mixel MIPI PHY IP
November 2025
indie
indie designs radar front-end modules and MMICs for automotive safety systems. Its radar processors run Mixel's ASIL-B MIPI D-PHY CSI-2 transmitter and receiver, delivered with a safety manual and certified safety documentation for AEC-Q100 Grade 1 designs.
“We needed a MIPI IP provider that could support our strict automotive requirements to further our radar portfolio and enable efficient and scalable ADAS architecture solutions. Through our long-standing partnership with Mixel and their extensive automotive experience, we had full confidence in Mixel’s capabilities and reliability.”
Peter Gulden, EVP Radar Systems and Software, indie
Press release
March 24, 2025
Faraday Technology Selects Silvaco FlexCAN IP for Advanced Automotive ASIC Design
Faraday selected Silvaco's ISO 11898-1 compliant FlexCAN IP, with CAN FD support, as the networking backbone for an automotive ASIC.
Catalog · PDF
Summer 2026
PRO IP product selection guide
Every PRO IP part number with its foundry and node, from MIPI PHYs to soft IP, and applications by market.
Press release
May 19, 2026
Mixel MIPI C-PHY/D-PHY combo IP on TSMC N2P
The first combo IP to support D-PHY v3.6 embedded clock mode, now available on TSMC N2P.
Bring your foundry, node and block list
Tell the IP team what you’re building and where. We’ll confirm which IP is available
as PRO IP on your process, what is silicon-proven there, and how licensing works.
If you don’t see what you need, more IP is in active development.
Questions about semiconductor IP cores
What is semiconductor IP?
Semiconductor IP is a design block, already built and verified, that you license for your own SoC instead of building it in-house. Typical examples are a MIPI PHY, an SRAM compiler, a standard cell library and an AMBA bus controller. Licensing proven IP cores frees your engineers for the logic that sets your product apart.
What is the difference between foundation IP and interface IP?
Foundation IP is the basic building blocks of a design: standard cell libraries, memory compilers and I/O. Interface IP connects the chip to sensors, displays, storage, other chips and in-vehicle networks, for example Mixel MIPI, LVDS and ASA PHYs, I3C, and automotive networking controllers such as CAN. System IP such as AMBA connects the blocks inside the chip.
Which foundries and process nodes are supported?
PRO IP is available on TSMC, GlobalFoundries, Samsung, SMIC, STMicroelectronics, Tower and UMC processes, from 2 nm to 180 nm depending on the product line. The table above shows coverage for each line. Soft IP such as AMBA, I3C and automotive networking controllers is synthesized onto the node you choose. If you don’t see your process, talk to the IP team.
What deliverables come with an IP license?
Hard IP comes as fully characterized, DRC/LVS-clean instances with Liberty, LEF and GDSII views. Soft IP comes as synthesizable cores. Each family page lists its full deliverables. For example, Mixel IP also includes integration guidelines, models, test benches and support through production.
Is Silvaco IP silicon-proven?
PRO IP is production-ready and available to license now, and much of it is silicon-proven. Mixel IP is silicon-proven on 13 nodes at 9 foundries, and Silvaco automotive networking controllers have shipped in more than one billion units. Ask the IP team about silicon status for a specific product and process.
What does PRO IP mean?
PRO IP stands for Production-Ready Offerings: Silvaco hard IP characterized for specific foundry processes, and synthesizable soft IP, available to license now. Every PRO IP product is listed in the PRO IP Product Selection Guide.
Related
PRO IP families
Mixel IP
MIPI D-PHY, MIPI C-PHY/D-PHY Combo, LVDS, ASA Motion Link IP
Foundation IP
Standard cells, memory compilers and I/O
AMBA
Bus controllers, fabrics and subsystems
Automotive networking
CAN, LIN and FlexRay controllers
I3C
Sensor connectivity cores
Other Silvaco IP
Embedded processors
ColdFire and 8051 cores
Power management
LDO regulators and a bandgap reference
IP management software
IP Grid
IPVault and IPAudit