Foundry Services
Foundry services: PDK development, library characterization, IP qualification and foundry certification
Your customers judge your process by the kit, libraries and IP you hand them, and Silvaco builds and qualifies that enablement with you, from SPICE models to physical verification with foundry certification from Tower Semiconductor, X-FAB and UMC.
What your customers need before they design on your process
Your process reaches designers as a kit. They open the PDK, place cells from your characterized libraries, drop in IP qualified for your node and run your rule decks at sign-off. If any piece is late or wrong, they notice it long before they see the silicon.
And the kit is never finished. Each new process, and every change to a running one, means models to re-extract, libraries to re-characterize and decks to requalify. Whoever carries that work has to keep your pace and meet your standards. Your customers expect it to drop into the flow they run today.
Where Silvaco fits in your process enablement
Everything in a kit rests on the models, so that’s where the work starts. If your team is short on
modeling or library engineers, Silvaco’s engineers can do that part.
04
Library Characterization
Characterizes, validates and optimizes your cell libraries
Alongside
SPICE modeling, library design and characterization, delivered as a service
What Silvaco can carry for your process
Where your enablement team is stretched, these are the pieces you can hand to Silvaco.
Foundry certification
SmartDRC/LVS is silicon-proven, and three foundries have certified it on processes of their own: Tower Semiconductor, X-FAB and UMC. Rule decks exist for processes at other foundries too, among them ams, IHP, SkyWater and Vanguard. Ask about yours before you write a deck from scratch.
Library characterization
Characterize a new library, or re-characterize one after a process change. You get Liberty views carrying the timing, power and noise models, plus Verilog and VITAL files. Output covers the NLDM, NLPM, CCS and ECSM formats, with LVF for variation. Silvaco also designs and optimizes standard cell libraries, as an independent IP vendor or alongside your own library team.
Model generation
Utmost IV fits SPICE models to the device data you have, simulated or measured, and checks each one before it goes into your kit. Silvaco’s SPICE modeling service will also do the extraction for you. It covers CMOS, SOI and TFT devices, bipolar transistors and diodes, JFETs, HEMTs and IGBTs, plus resistors and capacitors.
Fab-level engagement
FTCO takes the same TCAD physics into the fab. Physics-based simulation, your production data and AI train a digital twin, and your engineers calibrate and optimize the process against it. Micron Technology uses it this way for memory development.
Applications
From the first kit on a new process to decks certified for it.
PDK development and maintenance
Custom PDKs and iPDKs for a new process, kept current as the process moves.
Standard cell and memory library characterization
Timing, power and noise data in Liberty format, characterized on your process.
IP qualification for a process
Kits, SPICE models and libraries proven in a full design flow before your customers rely on them.
Rule deck development and physical verification enablement
DRC and LVS decks written for your processes and taken through your own certification.
Foundries already building enablement with Silvaco
Three foundries stand behind Silvaco physical verification with their own certification,
and two describe the library work behind their kits.
Foundry · SURGE 2023 presentation
February 2022
Silvaco and Tower Collaboration in Design Kit and Standard Cell Library Development and QA
Tower names Silvaco its main standard cell library provider across all of its technologies. The session covers new libraries for Tower's 65 nm advanced power management process, with advanced characterization and MTBF calculation. It also shows how Tower qualifies its iPDK and SPICE models in Silvaco's analog flow.
Ofer Tamir, Managing Director, CAD, Design Enablement and Support, Tower Semiconductor
Webinar
February 2022
SmartDRC/LVS, certified by Tower Semiconductor, X-FAB and UMC
Silicon-proven physical verification, signed off on each foundry's own processes, with decks available for more.
Foundry · Webinar
February 2022
Learn How SilTerra Uses Cello and Viola for Standard Cells and I/O Library Optimization and Characterization
An active foundry with frequent process changes, SilTerra walks through how it gets new libraries developed and validated sooner without adding resources.
Faris Amsyar Bin Ahmad Zhaki, IP Staff Engineer, SilTerra Malaysia Sdn. Bhd
Collaboration · FTCO
February 2022
Micron Technology and FTCO
Micron trains an FTCO digital twin on its fab data and physics-based simulation to speed memory design and pathfinding.
News
February 2022
Silvaco and Si2 Release Unique, Free 15nm Open-Source Digital Cell Library
A 15 nm standard cell library Silvaco built on the FreePDK15 kit, free to Si2 members and universities under the Apache-2.0 license.
Table
February 2022
Foundries, nodes and PDKs we support
The published sample of supported PDKs, by foundry and process node.
More on foundry enablement
Service
Library Characterization
Service
Library Design
Service
SPICE Modeling
Tools
Library Characterization and Optimization
Article · 2004Tool
LibertyForge LC
List
Process Design Kits (PDKs)
Planning enablement for a new process?
Tell our engineers which process it is and what your customers are waiting on: the kit, the libraries,
the models or the rule decks. They’ll tell you which parts Silvaco can take on and how each
would be qualified for your customers.
Questions about foundry enablement
What is foundry enablement?
Foundry enablement is everything a foundry releases so customers can design on its process: the PDK, SPICE models, characterized cell libraries, qualified IP and physical verification rule decks. Designers weigh a process by how complete and current that set is. It has to be rebuilt and requalified each time the process changes.
What does PDK development involve?
A PDK turns a process into something designers can use: device symbols and layouts, SPICE models, technology files and verification rule decks, set up for their design tools. Development means extracting the models, building and testing the kit, then maintaining it through every process revision. An interoperable PDK, or iPDK, lets one kit serve several tool flows.
Which foundries have certified Silvaco physical verification?
Tower Semiconductor, X-FAB and UMC have granted foundry certification to Silvaco DRC and LVS for processes of their own, and the tools are silicon-proven. Decks for ams, IHP, SkyWater and Vanguard processes exist as well. Certification applies process by process, so confirm yours with our technical experts before you plan around it.
What is library characterization and who needs it?
Library characterization simulates each cell in a standard cell library across process, voltage and temperature corners. Timing, power and noise results go into Liberty views, the format your customers' synthesis and timing tools read. Foundries and IP providers redo it whenever a process is introduced or revised. Silvaco supplies it as tools and as a service.
Can Silvaco develop a PDK for a new process?
Silvaco has built custom PDKs, supports iPDKs, and designs and characterizes cell libraries as a service. Its design kit and library work with Tower Semiconductor includes libraries for a 65 nm power management process. Whether that extends to your new process depends on the process, so the first step is a conversation with our technical experts.
How does FTCO extend a foundry relationship?
Enablement usually ends where the kit ships. FTCO goes into the fab. It builds an AI-trained digital twin from physics-based simulation and production data, so fab engineers can calibrate and tune the process itself. Micron Technology is one published example, in memory development.
Related
Guardian DRC/LVS (Tool)
Tools for building and characterizing standard cell libraries.
Utmost IV
Compact model extraction and validation for your kit.
Expert
Layout editing with custom PDKs, iPDK and OpenAccess.
Gateway
Schematic capture on the same PDKs.
FTCO
Fab Technology Co-Optimization: digital twins your fab engineers calibrate and tune.
Process Design Kits (PDKs)
Silvaco engineers do the SPICE modeling and library work for you.