Gateway
Gateway: hierarchical schematic editor for analog and mixed-signal design
Capture an analog, digital, mixed-signal or RF IC design once. Gateway netlists that one schematic for simulation, layout and LVS, so nothing gets re-entered between steps.
What Gateway does
Gateway is Silvaco’s schematic editor for integrated circuit design. You capture analog, RF, digital and mixed-signal circuits in one hierarchical schematic, and Gateway generates every view the rest of the flow reads. Where you start decides how many handoffs follow. Start here, and the circuit you drew is the one SmartSpice simulates, Expert lays out and SmartDRC/LVS checks. Flat or hierarchical, in any process technology. Designs from other schematic editors come in through OpenAccess or EDIF.
Capabilities
Built for designs too big for one sheet, and for teams that share them.
Editing
Work across multiple views and sheets in one hierarchy, however large the design gets. Wires and busses are edited where they sit, including ripping a bus apart or merging several into one.
Connect by wire, by pin or by net name, or let implicit, global and inherited connections do it for you. Naming rules for busses, instances and nodes keep a big design readable.
Checking and inspection
Set your own electrical and drawing rule checks, and Gateway flags netlist violations before they reach the simulator. Minimum and maximum limits on parameters catch a mistyped value the moment you enter it.
Show device parameters, DC bias and thresholds right on the schematic, down to each MOS device’s operating region, at any level. View Info follows a signal from level to level, and cross-probing ties every net to its waveform.
Formats and interfaces
One schematic writes SPICE, CDL, NDL and Verilog (IEEE 1364) netlists, plus HSPICE-compatible input decks.
It works with OpenAccess and iPDKs, and trades schematics with third-party editors using EDIF 2 0 0. Only have a SPICE or Verilog netlist? Gateway draws the symbols from it.
Scripting
JavaScript, extended with around 200 Gateway functions, lets you reshape menus and the interface around how your team works, and add callback symbols of your own.
Callbacks evaluate expressions as you edit: design rules, tolerances, parametric calculations, process skews.
Protection
Encrypt what shouldn’t be exposed, whether that’s your own IP or a third party’s block inside your design.
A design kit can ship encrypted netlists behind its symbols, so the people you give a block to can use it without opening it.
Works with
However a design starts, the same schematic feeds every tool after it.
Takes in
A circuit drawn in Gateway, or a netlist you already have. Point Gateway at a legacy SPICE or Verilog netlist and it generates the symbols. Schematics from other editors arrive through OpenAccess or EDIF 2 0 0.
Third-party inputs: OpenAccess and EDIF 2 0 0 schematics, and iPDK foundry kits.
Hands off to
Every tool downstream reads the one schematic.
SmartSpice: circuit simulation, with results back-annotated on the schematic and rubberband tuning without leaving Gateway
SmartSpice Pro: FastSPICE runs on the SPICE and HSPICE netlists Gateway writes
SmartView: waveforms, cross-probed to the nets on your schematic
Expert: schematic-driven layout, with Gateway supplying connectivity and automatic placement
SmartDRC/LVS: physical verification from the LVS netlist, cross-probed with the schematic and the layout
Victory Device: TCAD device simulation, for circuits that depend on how a single device behaves
Silos: Verilog simulation for the digital side of a design
Outside Silvaco: HSPICE, via the compatible input decks Gateway writes, and other vendors’ schematic tools over EDIF 2 0 0
Applications
From a single standard cell to an LNA and mixer.
Analog and digital blocks
Build new blocks, or port existing ones to a new process, flat or hierarchical.
Mixed-signal design
Transistor-level circuits and Verilog-A behavioral blocks in the same schematic.
RF design
LNAs, mixers and frequency dividers, simulated straight from the schematic.
Standard cells and IO
Cells, I/O and hierarchical memories captured in the same environment.
Who runs it, and what to read next
Two companies have put their names to Gateway publicly. The datasheet, the slides and the app notes open with no form to fill in.
Customer
July 2025
APEC
The Taiwan-based silicon and silicon carbide power device maker has committed long term to Silvaco for its SiC work. Victory Device covers the device side; Gateway and SmartSpice cover the circuit.
“The combination of Victory Device, Gateway, and SmartSpice provides us with a comprehensive solution that bridges the gap between process development and circuit design…”
Dr. CS Chang, President, APEC
Press release
July 2025
Silicon Creations relies on Silvaco's custom design flow for new advanced FinFET designs
The analog and mixed-signal IP supplier runs Gateway with Expert and SmartView in its most advanced FinFET flow, for IP in production from 7 to 180 nm.
Product brief · PDF
August 2022
Gateway – Schematic Editor
Two pages: editing features, the netlists it writes, and how it connects to SmartSpice, SmartView and Expert.
Presentation · PDF
July 2025
Gateway schematic capture
Schematic-driven layout with Expert, SmartDRC/LVS cross-probing, the symbol generator, and simulation results written back onto the schematic.
Application note · PDF
July 2025
Schematic driven process corners analysis
A five-stage current-starved VCO, taken from a Gateway schematic to SmartSpice across three corners of a 0.18 µm UMC process.
Application note · PDF
August 2022
New syntax for running Verilog-A models in Gateway/SmartSpice
Drop a Verilog-A behavioral model into a schematic as a subcircuit. A D flip-flop simulates about ten times faster than at transistor level.
Put your own circuit through it
Send a schematic or a legacy netlist from your current flow, and our application engineers will
capture, netlist and simulate it in Gateway. You’ll see the tool work on the design you actually
have to tape out.
Questions about Gateway
What is a schematic editor?
A schematic editor is the tool where you draw a circuit as symbols and wires, then turn the drawing into netlists for simulation and layout-versus-schematic checks. In IC design, it's where the flow begins. Silvaco's is Gateway, which handles RF, analog, digital and mixed-signal circuits, flat or hierarchical.
Which netlist formats does Gateway support?
Four formats come out of one schematic: SPICE, CDL, NDL and Verilog (IEEE 1364), covering simulation, LVS and layout. Gateway also produces HSPICE-compatible input decks. It also works in reverse, turning a SPICE or Verilog netlist into symbols, and swaps schematics with other editors through EDIF 2 0 0 or OpenAccess.
Can Gateway drive third-party simulators?
Yes, HSPICE: Gateway writes HSPICE-compatible input decks. Within Silvaco it also drives SmartSpice, the Silos Verilog simulator and the TCAD device simulators. No integration with any other simulator environment is published, so if your flow relies on one, raise it with our application engineers before an evaluation starts.
Does Gateway work with iPDKs?
Yes. Gateway supports OpenAccess and interoperable PDKs (iPDKs), so a foundry kit written for OpenAccess tools works from your schematic onward. Silvaco also maintains an extensive set of its own custom PDKs. Kits change as foundries release new ones, and the Process Design Kits page lists what's current for your foundry and node.
How does Gateway connect to layout?
Through Expert, Silvaco’s layout editor. Gateway passes connectivity to Expert and drives its automatic placement, and Expert keeps each device where its symbol sits relative to the others. You can cross-probe between the schematic, the layout and SmartDRC/LVS results. Expert can also start from a SPICE or CDL netlist instead.
Can schematics be encrypted?
Yes. Silvaco's encryption covers your own IP and any third-party IP inside a design. Design kits go a step further. A symbol can hide an encrypted netlist, so the team or customer you hand a block to can simulate it without ever reading the netlist behind it.
Related
Expert
The layout editor Gateway drives, for schematic-driven layout.
Analog and Custom IC
The whole flow from schematic to sign-off, and all nine products in it.