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Simulation Standard
Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.
27 years ago
Hints & Tips January 1999
A. UTMOST III SOI module has three routines for characterization of the parasitic BJTs of SOI devices. These routines are "IC/VCE", "Gummel" and "INT_BJT" All routines require to have 5
27 years ago
VBIC Version 1.2 Released in SmartSpice and UTMOST III
The latest VBIC bipolar model v1.2 of Sep 24 1999 has been integrated into SmartSpice and UTMOST III. It can be invoked by specifying the model selector LEVEL=5 and the
27 years ago
RF CMOS Device Modeling: BSIM-Based Physical Model with Root-Like Construction Approach – Small Signal Modeling
A novel extraction method of high frequency small-signal model parameters for MOSFET is proposed. From S-parameter measurement, this technique accurately extracts the MOSFET model parameters including the charge conservation capacitance
27 years ago
Hints & Tips December 1999
Q: I tried to resize shapes using the DRC command and observed thin "cracks" appeared for polygons with holes (see the left shape in Figure 1). At the same time
27 years ago
An Intuitive Front-End to Effective and Efficient Schematic Capture Design
In our previous publication ("Scholar: An Enhanced Multi-Platform Schematic Capture", Simulation Standard, Vol.10, Number 9, September 1999) we presented the main features of a new-generation schematic capture tool - Silvaco's
27 years ago
Hints & Tips November 1999
A: ATLAS/S-Pisces and ATLAS/Blaze both have a small signal ac analysis capability built into them. This analysis is based upon the work of S.Laux [1] and results in the extraction
27 years ago
Modeling Bidirectional Thyristors Using ATLAS
Thyristors are semiconductor devices that exhibit multi-stable or bi-stable electrical characteristics, and can be switched between a high-impedance OFF state and a low-impedance ON state. Bidirectional thyristors are particularly useful
27 years ago
Modelling Tunneling Currents in Ultra Thin Oxides
Ever decreasing minimum geometries in MOSFET design results in a corresponding reduction in the thickness of the gate oxide. This is an inevitable result of the increasing doping levels in
27 years ago
Optoelectric Device Simulation of a Dual-Base BJT Using Luminous
With the continuing emergence of optical technologies, optoelectronic device structures are becoming increasingly important for modern telecommunications and data network applications. Like other semiconductor technologies, two-dimensional numerical simulation can be
27 years ago
The Industry Standard of SOI Technology From Process To Circuit Simulation
SOI technology for state of the art CMOS technology is rapidly approaching maturity. PD-SOI device design has the advantage of easier manufacturing but requires more sophisticated device and circuit design