6 years ago
2020년 11월 18일 | 3:00am-3:30am (한국 시각) 파티션 기반 시뮬레이션을 채택함으로써 SmartSpice HPP가 아날로그 회로의 과도 시뮬레이션의 모든 내부 측면을 가속화하기 위해 현대의 멀티코어 하드웨어 플랫폼을 어떻게 활용하는지 살펴
6 years ago
In this paper the critical design features of a SiC superjunction trench MOS device were optimized using CAD to obtain a high breakdown voltage while minimizing any unnecessary increase in
6 years ago
Conductive Bridge Random Access Memory (CBRAM) is a non-volatile memory device technology that can operate by consuming very low power. Another advantage of the CBRAM devices is its ability to
6 years ago
The qualification of GaN power high-electron-mobilitytransistors (HEMTs) must consider the device ruggedness against out-of-SOA (safe operating area) events [1- 3].
6 years ago
Dry etching is commonly used in semiconductor processing to generate deep trenches with good anisotropy. Dry etching is applied to many semiconductor technologies including Advanced FinFETs, 3D NAND, and vertical
6 years ago
September 17, 2020 | 13:00 – 13:30 (JST) The accuracy of rule-based full-chip parasitic capacitance extraction tools including Silvaco's Hipex is highly dependent on the description of the rule files.
6 years ago
2020년 10월 14일 | 2:00am-2:30am (한국 시각) 계산량이 지속적으로 증가하고, 메모리 시스템이 점점 높은 주파수에서 동작함에 따라, 고밀도, 저전력으로 면적을 적게 차지하는 고성능 메모리 서브 시스템에 대한 수요가 계속해서 증가하고
6 years ago
Silvaco technologists and research partners will be participating in the ESSDERC/ESSCIRC 2020 joint conference for solid-state devices and circuits. Tutorial #8, Ab-initio simulations supporting new materials & process developments, chaired
6 years ago
2020 TCAD Baseline Release Section 1: Process Simulation – New Features in 2020 Baseline Release
6 years ago
2020 TCAD Baseline Release Section 2: Meshing – New Features in 2020 Baseline Release