Silvaco at Upcoming Solid-State Conferences – ESSDERC 2020 and SISPAD 2020

Silvaco technologists and research partners will be participating in the ESSDERC/ESSCIRC 2020 joint conference for solid-state devices and circuits.  Tutorial #8, Ab-initio simulations supporting new materials & process developments, chaired by Denis Rideau (STMicroelectronics) and Philippe Blaise (Silvaco), includes a presentation by Dr. Tillmann Kubis of Purdue University. Dr. Kubis is working with Silvaco in the area of atomistic simulation.  He will present on  Atomistic Green’s functions: the beauty of self-energies.

Accelerating Design with the Victory TCAD Suite

The Simulation Standard, Silvaco’s technical journal for semiconductor process and device engineers is beginning its 30th year of publication. The latest issue has just been released and it outlines a complete power device design flow using the Victory suite of TCAD simulation solutions – Victory Process, Victory Mesh, and Victory Device.

TCAD Simulations of RF-SOI Switches with Trap-Rich Substrate

The market for cellular components has been shifting rapidly from GaAs pHEMT or silicon-on-sapphire (SOS) to silicon-based technology. CMOS (silicon-on-insulator) SOI antenna switches which are compatible with multimode GSM/EDGE, TD/WCDMA, and LTE systems exhibit higher integration levels and have become the fastest growing mobile phone submarket. CMOS-SOI processes, especially with thin silicon, have the potential to rival the FoM that was traditionally feasible only with GaAs technologies.

For Next Generation Nanowires, Simulation from Atoms to SPICE

As process nodes continue to shrink, the requirement for additional physics-based simulation is gradually creeping into each stage of the design process. By way of illustration, Technology Computer Aided Design (TCAD) simulations are becoming more atomistic in nature, SPICE models are becoming process aware to take account of localized strain effects, and back or middle end of line (BEOL or MEOL) parasitics are moving from exclusively two-dimensional (2D) rule-based solutions to full 3D structure field solvers for numerous critical sections of the layout.

Atomistic Analysis and Next Generation Computing at IEDM 2019

IEDM is THE device conference with more than a thousand participants from major companies and R&D institutes. Many talks were dedicated to new memory devices and circuits, including Ferroelectrics, MRAM, RRAM, driven by the requirements of AI processing. EUV is definitely there for 3nm and beyond. 3D integration was shown for LP-HP logic and RF. Gate-All-Around devices, with nanowires or nanosheets are mature versus FinFET.

Silvaco Exhibits and Presents Invited Paper on Atomistic Simulation at IEDM 2019

The IEEE International Electron Devices Meeting (IEDM) is the world’s preeminent forum for reporting technological breakthroughs in the areas of semiconductor and electronic device technology, design, manufacturing, physics, and modeling. It is the flagship conference forNanometer-scale CMOS transistor technology, advanced memory, displays, sensors, MEMS devices Novel quantum and nano-scale devices and phenomenology Optoelectronics, devices for power and energy harvesting, high-speed devices Process technology and device modeling and simulation

How TCAD Can Optimize Power Electronics

The power electronics (PE) market is growing rapidly, driven by the accelerating demand of EV and HEV vehicles. Power devices lend themselves to design and manufacturing innovations at the transistor-level to improve device performance and reduce development and production costs. Silicon-carbide (SiC), gallium-nitride (GaN), and other wide bandgap materials have started to replace silicon in high-voltage power devices.

The Need for Advanced Wide Bandgap Power Electronics

PowerAmerica’s strategic roadmap for next generation wide bandgap (WBG) power electronics (PE) came out earlier this year. The public version of the roadmap includes a background/introduction and market forecast pertaining to silicon carbide (SiC) and gallium nitride (GaN) PE. I learned a great deal about SiC & GaN PE in this roadmap and I have copied the relevant sections below.

3D TCAD Simulation for Power Devices

y first IC design back in 1978 was a DRAM and it ran on 12V, 5V and -5V, but then my second DRAM was using only a 5V supply. Today we see SOCs running under a 1V supply voltage, but there is a totally different market for power devices that are at the other end of the voltage spectrum and they handle switching ranges from 12V – 250V. To learn more about power devices and how the process and device modeling is done, I read a Silvaco publication entitled Advanced Process and Device 3D TCAD Simulation of Split-Gate Trench UMOSFET.

Where Circuit Simulation Model Files Come From

I started out my engineering career by doing transistor-level circuit design and we used a proprietary SPICE circuit simulator. One thing that I quickly realized was that the accuracy of my circuit simulations depended entirely on the model files and parasitics. Here we are 40 years later and the accuracy of SPICE circuit simulations still depend on the model files and parasitics, but with the added task of using 3D field solvers to get accurate parasitic values, and even the use of 3D TCAD tools to model the complex physics of nm IC designs using FinFET transistors.