Yearly Archives: 2020
Home > Search Results For
2020
Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.
6 years ago
Simulate 40X Faster with SmartSpice HPP
In this webinar, we describe how SmartSpice HPP takes advantage of the modern multicore hardware platforms to speed up all internal aspects of transient simulations of analog circuits by adopting
6 years ago
Optimizing a 2um, 1,500 Volt SiC Superjunction Trench-MOS Device Using TCAD
In this paper the critical design features of a SiC superjunction trench MOS device were optimized using CAD to obtain a high breakdown voltage while minimizing any unnecessary increase in
6 years ago
TCAD Simulation of CBRAM Devices
Conductive Bridge Random Access Memory (CBRAM) is a non-volatile memory device technology that can operate by consuming very low power. Another advantage of the CBRAM devices is its ability to
6 years ago
TCAD Mixed-Mode Simulation for GaN Power HEMTs in Unclamped Inductive Switching
The qualification of GaN power high-electron-mobilitytransistors (HEMTs) must consider the device ruggedness against out-of-SOA (safe operating area) events [1- 3].
6 years ago
Using Victory Process Open Model Interface to Customize Etch Emulation Model – Example
Dry etching is commonly used in semiconductor processing to generate deep trenches with good anisotropy. Dry etching is applied to many semiconductor technologies including Advanced FinFETs, 3D NAND, and vertical
6 years ago
Silvaco Acquires the Assets of Coupling Wave Solutions S.A.
September 9, 2020
6 years ago
Improvement of Parasitic Capacitance Extraction Rules for Large-Scale Layout and Its Accuracy Verification Method
September 17, 2020 | 13:00 – 13:30 (JST) The accuracy of rule-based full-chip parasitic capacitance extraction tools including Silvaco's Hipex is highly dependent on the description of the rule files.
6 years ago
Choosing the Right DDR Memory Subsystem for Your Next SOC!
October 13, 2020 | 10:00 am – 10:30 am (PST) As computation requirements continue to build and memory systems are operating at ever higher frequencies, high-performance memory subsystems that consume
6 years ago
Silvaco at Upcoming Solid-State Conferences – ESSDERC 2020 and SISPAD 2020
Silvaco technologists and research partners will be participating in the ESSDERC/ESSCIRC 2020 joint conference for solid-state devices and circuits. Tutorial #8, Ab-initio simulations supporting new materials & process developments, chaired