Learn How SilTerra Uses Cello and Viola for Standard Cells and I/O Library Optimization and Characterization

February 16, 2023 In this webinar, we will share the challenges of optimizing and validating different libraries, and demonstrate how Cello, Viola, and SmartSpice contribute in a unique and dynamic way to realize fast and accurate optimization and characterization.

Learn About Silvaco’s AMBA AHB Subsystems and How to Customize, Secure, and Verify

May 12, 2022 In this webinar, we will provide an overview of the AMBA AHB subsystems and products offered by Silvaco. Some topics of discussion include Channel vs. Fabric architecture, low power, customization, hardware- and software-based security, and co-verification of the hardware and software.

Designing with Silvaco’s Octal SPI Memory Controller with Advanced Memory Support for IoT Systems

September 9, 2021 | 10:00 am – 10:30 am (PDT) This webinar will focus on a specific class of memory devices – targeted to mobile and IoT applications – that use “SPI” (Serial Peripheral Interface) signaling.

Achieving Extreme Low Power IoT Designs with Silvaco’s 55LPx Foundation IP Solution

June 24, 2021 | 10:00 am – 10:30 am (PDT) 
In this webinar you will learn how Silvaco Foundation IP helps you achieve your low power designs Memory compiler features and flexibility Standard Cell library features and implementation.

Development & Delivery of Complete IO & ESD Library in 5 Weeks

June 3, 2021 | 10:00 am – 10:30 am (PDT) 
In this webinar, you will learn development & delivery of complete IO & ESD library in 5 weeks.

Accelerating Wireless IOT SoC Implementation with Silvaco AMBA® Subsystem IP

January 28, 2021 | 10:00 am – 10:30 am (PST) In this webinar you will learn how Rafael Microelectronics has deployed Silvaco’s AMBA subsystem in their latest IOT design. Rafael Microelectronics develops high frequency broadband RF IC designs and narrow band IOT IP and devices. Rafael recently created a new wireless IOT SoC employing Rafael’s Bluetooth/Zigbee/Sub-GHz RF IP, leveraging Silvaco’s ABMA subsystem IP.

How to Design Ultra-low Power Embedded Memories with Silvaco Memory Compilers

February 23, 2021 | 10:00 am – 10:30 am (PST) This webinar presents Silvaco’s Embedded Memory offerings as part of a complete Foundation IP suite that includes Standard Cells and IO’s.

Reducing the Layout Development Cycle Time for Standard Cells

January 14, 2021 | 10:00 am – 10:20 am (PST) In this webinar, Sharmistha Sinha and Anand Mishra share their analysis and experience with Cello done at ST on multiple technologies.

Choosing the Right DDR Memory Subsystem for Your Next SOC!

October 13, 2020 | 10:00 am – 10:30 am (PST) As computation requirements continue to build and memory systems are operating at ever higher frequencies, high-performance memory subsystems that consume minimal power consumption and small silicon area are a necessary requirement.

High speed Interface Design: Best Practices

August 27, 2020 | 10:00 am – 10:30 am (PDT) This webinar will provide a presentation on challenges and solutions associated with the development of high-speed interface design in modern SOCs