Choosing the Right DDR Memory Subsystem for Your Next SOC!

October 13, 2020 | 10:00 am – 10:30 am (PST) As computation requirements continue to build and memory systems are operating at ever higher frequencies, high-performance memory subsystems that consume minimal power consumption and small silicon area are a necessary requirement.

High speed Interface Design: Best Practices

August 27, 2020 | 10:00 am – 10:30 am (PDT) This webinar will provide a presentation on challenges and solutions associated with the development of high-speed interface design in modern SOCs

How to Secure an AMBA AHB Subsystem for the ARM Cortex M3 Processor

July 28, 2020 | 10:00 am – 10:30 am (PDT) This webinar will provide a discussion of common methods used to secure an AMBA-based hardware and software system design.

Samsung Foundry and Silvaco Design IP: The Right Solution for Your Next SoC!

May 28, 2020 | 10:00 am – 10:30 am (PDT) In this webinar, we will provide a thorough introduction to Samsung Foundry and its process capabilities, along with the IP enablement that Silvaco provides to accelerate your design development.

What's in the New MIPI Alliance I3C V1.1 Standard?

February 27th 2020 | 10:00 am - 11:00 am (PST) I3C has the advantages in reducing pin count, increasing performance, and decreasing power while achieving some level of backwards compatibility with the long established I2C interface. The new I3C V1.1 announced in January 2020, enables faster interface speeds up to 100 Mhz and has many other new features that will aid the transition from I2C to I3C in applications.