• Technical Library

Simulation Standard

A Journal for Process and Device Engineers

simstd Sep2021

Singular Point Source MOS Cell Concept (S-MOS) Implemented on a Narrow Mesa Trench IGBT

Abstract— A Singular Point Source MOS (S-MOS) cell concept suitable for power MOS based devices is presented. The S-MOS differs from a standard Planar or Trench MOS cell in the manner by which the total channel width per device area is devised. The S-MOS single cell channel width is defined as the peripheral length of a line running approximately along the N++ source and P channel junction which is positioned on a gated trench side-wall. The length of the line is established from a singular point implant source for forming the N++ source region which geometrically corresponds to the shape of the N++/P junction. The N++ and PChannel profiles achieved are similar to those for a planar cell, but for the S-MOS, they are situated on a trench side-wall. The total device channel width will therefore depend on the total number of gated trench side-walls per chip. The S-MOS provides a unique approach for MOS cell layout designs and is applicable to different MOS based power devices. In this paper, the S-MOS is implemented on a 1200V IGBT by means of 3D-TCAD simulations while providing results highlighting the potential advantages with respect to the device static and dynamic performance. Keywords – MOS cell, Insulated gate bipolar transistors.
simstd Sep2021

Singular Point Source MOS Cell Concept (S-MOS) Implemented on a Narrow Mesa Trench IGBT

Abstract— A Singular Point Source MOS (S-MOS) cell concept suitable for power MOS based devices is presented. The S-MOS differs from a standard Planar or Trench MOS cell in the manner by which the total channel width per device area is devised. The S-MOS single cell channel width is defined as the peripheral length of a line running approximately along the N++ source and P channel junction which is positioned on a gated trench side-wall. The length of the line is established from a singular point implant source for forming the N++ source region which geometrically corresponds to the shape of the N++/P junction. The N++ and PChannel profiles achieved are similar to those for a planar cell, but for the S-MOS, they are situated on a trench side-wall. The total device channel width will therefore depend on the total number of gated trench side-walls per chip. The S-MOS provides a unique approach for MOS cell layout designs and is applicable to different MOS based power devices. In this paper, the S-MOS is implemented on a 1200V IGBT by means of 3D-TCAD simulations while providing results highlighting the potential advantages with respect to the device static and dynamic performance.
Simstd Aug2021

A Comprehensive Oxide-Based ReRAM TCAD Model with Experimental Verification

Abstract—During the last few years, oxide-based ReRAM technology has attracted intense industrial and scientific research interest. Therefore, we have performed an in-depth computational study with a focus on data retention besides the resistive switching and the current run-away. Our newly developed comprehensive TCAD (Technology Computer Aided Design) model provides deep insight into the underlying microscopic processes and is validated against experimental data as an accurate and predictive simulation tool.
Q3_July2021

2021 TCAD Baseline Release

New Features in 2021 Baseline Release: Section 1: Process Simulation Section 2: Device Simulation Section 3: Victory Mesh Section 4: Parasitic Extraction

An Introduction to Meshing in Victory Process

Victory Process (VP) uses two types of mesh to represent the structure: • The geometry mesh, which is used to represent the material regions. • The volume mesh, which is used to represent the volume data (doping etc).

Compact Multi-Level Digital-to-Analog Conversion Using Thin-Film Multimodal Transistors

Unlike conventional ohmic contact thin-film transistors (TFTs), contact-controlled TFTs [1], [2] rely on source energy barriers to produce a range of benefits including: low saturation voltages; extremely high intrinsic gain; power-efficiency; electrical stability; and uniformity of operation, notably with imprecise processes [3]. Generally, these benefits come at the expense of transconductance, however in materials such as polysilicon, similar levels of on-current can be obtained in a more compact footprint without any trace of kink-effect [4], [5].