Simulation Standard

Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.

22 years ago

A New Efficient Quantum Method: The Bohm Quantum Potential Model

This article presents a new approach to model the quantum confinement of carriers in MOSFET or heterostructure. SILVACO has already included in its device simulator ATLAS, a Schrödinger-Poisson solver and

22 years ago

The subject of how to use the EXTRACT statement in DeckBuild often arises

The subject of how to use the EXTRACT statement in DeckBuild often arises. The EXTRACT statement is a very useful tool for analysing data and can be performed on both

22 years ago

Simulating Selective and Non-Selective Epitaxy over Oxide Isolated Regions Using Athena

In certain cases, most notably in modern bipolar and SiGe HBT structures, epitaxial steps are performed after the oxide isolation structures have been already created. Thus the initial surface prior

22 years ago

Silvaco’s RFIC Design Suite

This article focuses on the use of Silvaco’s RFIC Design Suite including PDK, SmartSpice-RF, and Gateway.

22 years ago

HiSIM-1.2 Parameter Extraction with the Revised UTMOST-III Local Optimization Strategies

HiSIM-1.2 parameter extraction methodology was discussed in detail in a previous issue of Silvaco Simulation Standard [1]. This article is meant to provide the precise UTMOST-III local optimization strategies to

22 years ago

A Family Portrait of the BSIM Models

1. Introduction BSIM1, the first model of the BSIM series was released about ten years ago. Some major improvements have been made since that time, making the BSIM3v3 and BSIM4

22 years ago

Customers are starting to use 64bit machines with large hard drives and Gigs of RAM

Customers are starting to use 64bit machines with large hard drives and Gigs of RAM and tend to forget the limitations imposed by a 32bit operating system. If you have

22 years ago

New Features in Expert Node Probing

Expert’s Node Probing is powerful tool for inspection of netlist components on layout. It is designed for highlighting layout objects electrically connected with each others. The additional features of Node

22 years ago

Parasitic Capacitance Extraction with Hipex and Exact

Overview To extract parasitic capacitances from a circuit layout, you need to perform the following steps:

22 years ago

Expert Layout Editor – New Commands Focus On Easier Operation

Expert layout editor version 4.0.1R has several new commands and functions released together with the new Qt GUI interface. Most of them are developed in order to improve easier operation.