23 years ago
Q: I would like to highlight two nodes at the same time in Expert. I currently use Verification->Node Probing->Pick Node to highlight a node, but I donít see how I
23 years ago
Spreading Resistance Profiling (SRP) retains its popularity in the semiconductor industry by an inexpensive means of capturing dopant profile information. However, device engineers often incorporate SRP data into process simulation
23 years ago
An eye diagram is a convenient way to visualise how the waveforms used to send multiple bits of data can potentially lead to errors in the interpretation of those bits.
23 years ago
An effective device structure for reducing leakage current in BH laser diodes with semiin-sulation doped Fe in InP blocking layers has been analyzed [3]. In this study, the leakage current
23 years ago
Mocasim is an advanced three-valley Monte Carlo simulator designed to generate the transport parameters used in Silvaco’s physical device simulators. It accurately calculates the material transport parameters of both direct
23 years ago
Q: EXACT has powerful scripting utilities for manipulating the final capacitance data and variables but is there an easier graphical front end that would also allow me to view the
23 years ago
HiSIM (Hiroshima university STARC IGFET Model) is one of the surface potential based Spice models [1], [2] and pioneered the iterative approach to obtain the surface potential applicable in compact
23 years ago
There are several ways to account for the effect of STI-induced stress in standard compact models. The purpose of this article is to present two different approaches developed by the
23 years ago
In this article, we describe practical behavioral modeling for highly non-linear circuits using Verilog-A, which is analog extension of Verilog-AMS. At first, we describe behavioral modeling techniques for phase/frequency detectors
23 years ago
Q. My simulation fails because SmartSpice cannot find a binned model, what does this mean?
23 years ago
HIPEX-Net is a hierarchical layout extractor. It can create both hierarchical and flat SPICE formatted netlists of the extracted layout. HIPEX-Net also performs ERC (Electric Rule Checking) on the extracted
23 years ago
There is the recent improvement in Expert Layout Editor, the “Shortest path” option was added to Flight line styles (Net Bar). This option allows to build the shortest tree (network)