Simulation Standard

A new version of Savage DRC system taps the full power of multiprocessor computers by introducing simultaneous execution of DRC commands from a DRC deck. A DRC deck is a

Silvaco Data Systems announces the release of CELEBRITY CAD suite: Expert layout editor, Savage DRC system and Guardian LVS for Linux platform.

It is well-known that parasitic effects are no longer negligible for modern integrated circuit technology. Among the most important parasitic effects limiting the chip performance are interconnect related problems like

To provide uniform etching of metal, dummy metal rectangles can be placed over an unused area of the chip. The following script generates dummy layer with a full array of

Q: How can I cut exactly the same hole in many layers? Q: How to skip a single layer during stream-out? Q: How to do filler boxes in Expert?

In this contribution we present a model for transient enhanced diffusion of boron in silicon. This model is based on the usual pair diffusion mechanism including non-equilibrium reactions between the

Interest continues to grow in the development of high electron mobility transistor (HEMT) technologies for micrometer and millimeter wave power applications. A primary concern of device designers working with such

This article presents a standard case of transmission line: the microstrip structure. First, the structure is described and then the results extracted from QUEST are compared with measurements. We thank

ATLAS allows the user to define a contact with a number of different boundary conditions; ohmic, Schottky, current controlled, floating or reflecting. The Schottky contact boundary condition realizes that at

We give in this article an introduction to the Verilog-A SmartSpice interface. This new feature in SmartSpice allows the user to write their own physical models in the Verilog-A language.