6 years ago
In this paper the critical design features of a SiC superjunction trench MOS device were optimized using CAD to obtain a high breakdown voltage while minimizing any unnecessary increase in
6 years ago
Conductive Bridge Random Access Memory (CBRAM) is a non-volatile memory device technology that can operate by consuming very low power. Another advantage of the CBRAM devices is its ability to
6 years ago
The qualification of GaN power high-electron-mobilitytransistors (HEMTs) must consider the device ruggedness against out-of-SOA (safe operating area) events [1- 3].
6 years ago
Dry etching is commonly used in semiconductor processing to generate deep trenches with good anisotropy. Dry etching is applied to many semiconductor technologies including Advanced FinFETs, 3D NAND, and vertical
6 years ago
September 9, 2020
6 years ago
September 17, 2020 | 13:00 – 13:30 (JST) The accuracy of rule-based full-chip parasitic capacitance extraction tools including Silvaco's Hipex is highly dependent on the description of the rule files.
6 years ago
October 13, 2020 | 10:00 am – 10:30 am (PST) As computation requirements continue to build and memory systems are operating at ever higher frequencies, high-performance memory subsystems that consume
6 years ago
Silvaco technologists and research partners will be participating in the ESSDERC/ESSCIRC 2020 joint conference for solid-state devices and circuits. Tutorial #8, Ab-initio simulations supporting new materials & process developments, chaired
August 26, 2020
6 years ago
2020 TCAD Baseline Release Section 1: Process Simulation – New Features in 2020 Baseline Release
6 years ago
2020 TCAD Baseline Release Section 2: Meshing – New Features in 2020 Baseline Release
6 years ago
2020 TCAD Baseline Release Section 3: Device Simulation – New Features in 2020 Baseline Release