Testimonials

Q: How can anti-reflective coatings be modeled when simulating photodetectors in ATLAS/Luminous? How can detection efficiency be plotted?A: Earlier version of ATLAS were able to handle refraction and reflection of

In our earlier paper [1] a new Binary Collision Approximation (BCA) module was described. It was shown that models and algorithms implemented into the BCA model allow to accurately predict

A common request from TCAD (Technology Computer Aided Design) users is advise on how to calibrate the process flow and device simulator to a particular technology. In this article, guidelines

FastBlaze uses novel device simulation techniques to simulate typical MESFET and HEMT characteristics in less than a minute. To be a truly useful engineering tool this extremely high speed must

The HP4155/56 DC Analyzer can be configured with SMU and Pulse Generator expander box frame called HP41501A. The expander box can have different measurement unit options.

An important aspect of statistical process control in IC production is the ability to predict circuit performance variation in the manufacturing process. Two new features in SPAYN allow the user,

The debut of Silvaco's new schematic editor, Scholar, is drawing closer. Scholar is a sophisticated design tool which derives its power and flexibility from the fact that it is built

In collaboration with STMicroelectronics Central R&D at Crolles (France), a new routine has been developed in UTMOST III to provide a complete solution for MOS Philips Model 9 parameter extraction.

The .ALTER statement is designed to allow a SPICE input deck to be re-run with a change in a single parameter. This feature is especially useful in characterization. For this

I run DRC, find one-two violations, correct them, then I re-run DRC to check whether my corrections worked. However re-running on the whole design is time-consuming. How can I run

Rectangular partitionings form a mathematical base for many modern approaches to automation of VLSI design [1-3]. In particular, popular methodologies of hierarchical placement (by cell grouping / merging) as well