Simulation Standard

This article introduces a DPT-based simulation method to perform the transient switching characteristics of an IGBT device. It also provides standard templates for power device switching characteristics and performance assessment

• Section 1: Process Simulation – New Features in 2024 Baseline Release
• Section 2: Device Simulation – New Features in 2024 Baseline Release
• Section 3: Victory DoE – New

It is often the case that a design of experiments (DOE) is required to optimize the performance of a particular device. Sometimes this simply means tweaking the implant dose for

Recently a new diffusion model was introduced to Victory Process: the CMOS model. This model aims at taking on the challenges brought by the specificities of CMOS device processing such

Properly setting the wafer orientation in Victory Process (VP) is critical for various processes such as ion implantation, etching, and deposition. For ion implantation in particular, the determination of the

Photonic integrated circuits (PICs) are a key enabling technology for a broad range of current and next-generation products. Combining semiconductor materials and manufacturing processes common to microelectronics with the encoding,

This paper presents a TCAD modeling approach for HfO2-based ReRAM (Resistive Random Access Memory). For describing the switching and retention behaviors of a ReRAM cell, the proposed model includes the

Numerical Algorithm to Perform Viscoelastic Analysis Viscous materials exhibit both viscous and elastic characteristics when undergoing deformation. The response of such materials to force is characterized by two distinct

New Features in the 2023 Baseline Release:

• Section 1: Process Simulation – New Features in 2023 Baseline Release
• Section 2: Device Simulation – New Features in 2023 Baseline Release

The past several years has seen a fast deployment of wide-bandgap power devices in fast chargers, electric vehicles, data centers and renewable energy processing. The performance of power devices is

It is common to run the process simulation for the part of a larger structure just to reduce the computation time. To account for the influence of parts of the

The utilization of thin material layers is common in modern semiconductor device fabrication. Subsequent etching steps require an accurate modeling of these thin layers. Although level-set based process TCAD simulations