Every software package contains a full set of examples suitable for that version and are installed with the software. If you see examples here that are not in your installation you should consider updating to a later version of the software. These examples can be used by beginners and advanced users for product evaluation, teaching purposes, and self-training.
Required Modules
Victory Device
- 2D Simulator
- 2D Quantum
This example demonstrates the capability of a TCAD simulation for Silicon NanoWire (NW) Gate-All-Around (GAA) Tunnelling Field-Effect Transistor (TFET) using the non-local band-to-band tunnelling (BTBT) model.
This example is related to the IEEE TED publication [1] and to the Silvaco Simulation Standard 2017 article [2].
This gives an example of using the BBT.NONLOCAL , QTX.MESH , and QTY.MESH models to study the Id-Vg characteristics of a Si NW-GAA-TFET at room temperature (300K) with two different drain voltages, 1.2 V and 0.05 V.
The deck uses the LOOP statement to loop commands in DeckBuild.
The LOOP is used to modify the drain voltage for two Id-Vg simulations. The TFET has a fine mesh at the junctions, specifically at the tunnelling junction between the p and i regions. For tunnelling to occur in the simulation, the p-i junction is overlayed with a quantum mesh. This quantum mesh is defined by the statement: QTX.MESH and QTY.MESH . This creates simple mesh for planar tunnelling junctions.
The model BBT.NONLOCAL is specified on the MODELS statement to use the non-local tunnelling model. The direction of tunnelling is specified by the QTUNN.DIR statement, with 0 being the y-direction and 1 being the x-direction.
Reference:
[1] Z. Y. Chen et al., “Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires, ” in IEEE Electron Device Letters, vol. 30, no. 7, pp. 754-756, July 2009.
[2] Silvaco Simulation Standard 2017 article “TCAD Simulations of TFET and Tunnelling Diode “.
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