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October 2026

Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.

1 week ago

004_tran_op : IBIS Buffer

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R Example 4 illustrates The input deck file ….. Input Files mod1.in Parametric analysis ***** Circuit description vcc vss 0 DC vccDC vin

1 week ago

005_buffer_delay : Buffer delay/risetime optimized for Vdd

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R The input deck contains a buffer circuit to be optimized for geometry (W/L) to get the best rise, fall and delay times

1 week ago

001_example_1 : Save and Recover to restart simulation

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R SmartSpice has ability to save a long simulation to files at specified checkpoints for further recovery and continuation in the case of

1 week ago

001_biaschk : Biascheck functionality

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R A 13 stage ring Oscillator built with fictional BSIM4 models is used to show how you can setup the .BIASCHK functionality to

1 week ago

002_biaschk3 : Bias checking of device

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R The .BIASCHK3 statement is intended to track and report the maximum duration time (dt) when the voltage difference between the specified device

1 week ago

003_dot_dout : Dout (Expected State of Digital Output Signal)

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R The .dout statement compares simulation results (node voltage) with the expected digital state during the transient analysis and generates an output report.

1 week ago

004_dot_vec : .VEC statement use

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R This example illustrates the AC magnitude response of the 2-pole Chebyshev Low Pass Filter schematic. The example uses the JFET-based LF356 operational

1 week ago

005_node_activity_report : .acheck (Check Node Activity)

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R This example input deckshows how you can use the .acheck functionality to check node activity in your circuit. This .acheck statement causes

1 week ago

006_vec_signal_state : Check output vs expected signal states

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R The .vec statement keyword “check_window” allows a user to perform steady and non-steady checks of the actual signal states against the expected

1 week ago

007_cut_off_tab : Search for cut-off nodes

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R In this example deck we use the .cutofftab statement to perform a search for the cut-off nodes. A node is considered cut-off