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004_dot_vec : .VEC statement use

004_dot_vec : .VEC statement use

004_dot_vec : .VEC statement use

Requires: SmartSpice & Smartview

Minimum Versions: SMARTSPICE 3.16.12.R

This example illustrates the AC magnitude response of the 2-pole Chebyshev Low Pass Filter schematic. The example uses the JFET-based LF356 operational amplifier. The Chebyshev magnitude response in db is shown from the magnitude.png waveforms screenshot to change as the poles of the filter are changed.

There are several ways to do this in SPICE, but a common method is to use a form of parametric analysis. In this example, the .ST statement is used to modify the capacitance value of C1 which is increased from 0.8uF to 1.2uF in steps of 0.1uF. The five magnitude responses from these values can be seen in the plot.

Input Files

DotVecIOSources.in — view contents
* TEST Vec file for input/output sources with parameters -
* slope, tris/tfall, period, t(o)delay vih/vil, vth, vol/voh

***** Circuit description
*****************************

r  node 0 1 

*******************************************************************
* .VEC WITH RIGHT FILENAME
********************************************************************
.Vec "DotVecIOSources.vec"

.TRAN 0.1ns 40ns
         
.PRINT  v(node)
  
.options nomod 

.END
DotVecIOSources.vec — view contents
; TEST Vec file for input/output sources with parameters - slope, tris/tfall, period, t(o)delay vih/vil, vth, vol/voh
radix  11

io     io

tunit ns

slope  0.6  0 1 
trise  0.2  10        
tfall  0.7  01           

period 3    


tdelay  10
vih     1.2
vil     0  

odelay  10 01 

vth 0.6 0 1 

vol      0    01
voh      1.2  01

vname node node

; initial pattern

1  0 
1  1
0  1
1  1
0  1
0  0
1  X
DotVecMemory.in — view contents
* .VEC - SRAM 512K TEST - only input signals *


.vec "DotVecMemory.vec"

.OPTIONS ACCT=2

r1 da0 0 1  
r2 da1 0 2
r3 wr  0 3
r4 rd  0 4 
r5 pch 0 5
r6 wl0 0 6
r7 wl1 0 6
r8 wl2 0 6
r9 wl3 0 6
****************************

.TRAN 0.5ns 50ns 
         
.options nomod nowarn

 
.tran 1n 250n

.print v(da0) v(rd) v(wr) v(pch) v(wl0) v(wl1) v(wl2) v(wl3)




.end
DotVecMemory.vec — view contents
; .VEC - SRAM 512K TEST - only input signals *

RADIX 111111111

vname da0 da1 wr rd pch wl[0:3]  
io iiiiiiiii
tunit ns
vih 3.3v
vil 0.0v
triz 110000000
tdelay 0.5 110101110

  0.0 000000000
  5.0 101011000
 25.0 100000000
 30.0 011010100
 50.0 010000000
 55.0 101010010
 75.0 100000000
 80.0 011010001
100.0 010000000
105.0 000000000
120.0 zz0111000
140.0 zz0000000
145.0 zz0110100
165.0 zz0000000
170.0 zz0110010
190.0 zz0000000
195.0 zz0110001
215.0 zz0000000
004_dot_vec — view contents
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