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Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.

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7 years ago

Silvaco Licenses HiSIM_IGBT Power Device Model Developed by HiSIM Consortium and Provides Support in SmartSpice Circuit Simulator

April 7, 2020

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7 years ago

Accelerate the Circuit Simulation Flow with Jivaro Parasitic Reduction

Accelerate the Circuit Simulation Flow with Jivaro Parasitic Reduction Jivaro is a unique, stand-alone solution for the reduction of parasitic networks that include resistors, capacitors, and inductors (RLCK). It helps

7 years ago

Silvaco Partners with HDL Design House for Analog and Digital IC Design Services

September 16, 2019

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7 years ago

Robust SPICE Modeling with Verilog-A: Principles and Practical Techniques

Robust SPICE Modeling with Verilog-A: Principles and Practical Techniques Insufficient robustness of models in SPICE circuit simulators may lead to a poor convergence, simulation failures and finally an unreliable or

7 years ago

Design Flow Applications Using the SmartSpice Analysis Engine

Design Flow Applications Using the SmartSpice Analysis Engine Circuit Simulation is at the heart of many Board, IC and Package design flows. To maximize throughput and efficiency, it is necessary

7 years ago

Unraveling and Optimizing Transistor-Level Simulation

Unraveling and Optimizing Transistor-Level Simulation Circuit Simulation is one of the most critical parts of the design process. Validating circuit behavior is essential to saving cost, minimize turn-around times and

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11 years ago

Solar cell modeling using TCAD and SPICE

Solar Cell Modeling Using TCAD and SPICE In this webinar a review of the TCAD-to-SPICE simulation flow of solar cells and solar panels and its related methodology will be presented.

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13 years ago

TCAD to SPICE simulation of SiC and Si Power Devices

TCAD to SPICE Simulation of SiC and Si Power Devices – Archive This webinar will provide a discussion of the methods used to design, simulate and optimize the performance of