Casey Molver

For the UTMOST III versions greater than 17.2.0.R, the UTMOST users can measure the CJSWG (CJGATE) capacitance using the "CJ/CJSW" routine. The CJ/CJSW routine in MOS technology has been modified

Cross-Sectional Viewer is a tool within Expert to simulate the cross sectional view of ICs along an arbitrary drawn cut-line on the layout. Cross-sectional Viewer is a link between the

The functionality of several features of Expert layout editor has been enhanced to deal with hierarchical layouts in more convenient ways.

An important step in electronic circuit design is layout versus schematic verification (LVS)

Q: Often I need to measure big objects. It order to position the ruler precisely I must zoom in at one end, zoom out that zoom again in at the

In previous Simulation Standard articles (Nov 97 & Nov 98) FastBlaze has been presented as a new, highly efficient approach to simulating advanced HEMTs and MESFETs. Conventional device simulators often

Predictive and efficient lithography simulation is an important component of the semiconductor industry efforts to develop the next generation of deep submicron technologies. Emerging technologies are based on elements with

In a Research & Development environment, Technology Computer Aided Design (TCAD) is involved in the device optimization loop and requires efficient and predictive implantation modeling with frequent updating of the

Yes. ATLAS now supports a wide range of materials in its database. This database covers single element conductors, binary compounds and quaternary compounds. A complete list of all materials can

In this paper, I have used the same technique to model uni-directional HV MOS devices as previously reported for bi-directional HV MOS devices [4] -[5] while adopting a new parameter

RF MOSFET Small - Signal Model and Parameters Small-signal equivalent circuit of MOSFET after de-embedding parasitics is shown in Figure 1 and small-signal model parameters are listed in Table 1.

SOI technology appears now to have become an advantageous, viable option for low-voltage and high-performance CMOS integrated circuits in digital, analog, and mixed-signal applications. The thin-film nature of the SOI