Testimonials

MIPI D-PHY IP: CSI-2 and DSI physical layer Silicon-proven D-PHY transmitters, receivers and Universal PHYs for your camera and display links, from the Mixel team that took D-PHY to real

MIPI I3C interface IP: controller and target cores Configurable I3C interface IP for SoC teams moving their sensors onto one two-wire bus: five controller and target cores from Silvaco, delivered

Automotive IP: CAN, CAN-FD, LIN and FlexRay protocol controllers Silvaco’s automotive IP gives your SoC team synthesizable CAN, CAN FD, LIN and FlexRay controllers, proven in use under ISO 26262

AMBA IP cores and subsystems: AXI, AHB and APB Silvaco’s AMBA IP gives your SoC team all three buses: AXI, AHB and APB controllers and peripherals, the fabric and bridges

Foundation IP: standard cells, memory compilers and interface IP Foundation IP you license rather than build: standard cell libraries, memory compilers and I/O, characterized on named foundry processes and tuned

IP testability: full-speed internal loopback for PHY IP Mixel D-PHY transmitters and receivers, now part of Silvaco, that check their own link at full data rate inside your SoC, on

LVDS IP: Low-Voltage Differential Signaling PHY LVDS IP designed by Mixel, now part of Silvaco: a four-channel, TIA/EIA-644-compatible serializer and deserializer pair for SoC teams whose chips talk to an

Multi-Standard SerDes IP: Combo and Configurable PHY Multi-standard SerDes IP from Mixel, a Silvaco company, for when your SoC has to speak more than one interface standard. Talk to an

Mixel IP Silvaco’s Mixel product line of silicon-proven mixed-signal interface IP: MIPI D-PHY, C-PHY and M-PHY, C-PHY/D-PHY and LVDS/D-PHY combos, LVDS, and ASA Motion Link. See available IP Talk to

Design IP: Production-Ready Offerings for Production-Ready SoCs Production-Ready Offerings (PRO IP) for SoC designs, characterized for specific foundry processes and available to license now: Mixel mixed-signal interface IP, standard cell

PEX Certify: qualify and compare parasitic extraction flows PEX Certify shows you, net by net, whether your parasitic extraction flow still agrees with itself after a PDK or extractor change,

VarMan XMA: full-chip memory yield analysis Estimate yield for the whole memory, not a slice of it. VarMan XMA rebuilds the full array and runs Monte Carlo across it, so