Testimonials

VarMan: statistical variation and yield analysis for analog, library and memory Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X

Viso: Schematic Viewer for SPICE Netlist Files Load a parasitic netlist and see which nets the layout is hurting, and why, before you queue a long post-layout simulation. Talk to

Jivaro Pro: parasitic reduction for post-layout SPICE simulation Jivaro Pro cuts an extracted parasitic network down before you simulate it, so post-layout SPICE runs finish sooner, at an accuracy you

Hipex: full-chip rule-based RC parasitic extraction Hipex runs parasitic extraction on the full chip or only the nets you pick, then writes the resistance and capacitance your layout adds back

SmartDRC/LVS: physical verification for analog, digital and mixed-signal ICs Check a layout against your foundry’s rules and its own schematic, then debug the results in your layout editor. Talk to

Gateway: hierarchical schematic editor for analog and mixed-signal design Capture an analog, digital, mixed-signal or RF IC design once. Gateway netlists that one schematic for simulation, layout and LVS, so

Expert: hierarchical analog layout editor for mixed-signal and RF ICs Analog layout, checked against design rules while you draw it. The editor opens designs larger than 10 GB in minutes.

Circuit Rubberband: real-time circuit tuning in SmartSpice Change a model or device parameter and watch the waveforms answer, so you settle the value in one sitting, not one rerun at

SmartSpice RadHard: radiation effects circuit simulation Find out if your circuit survives a particle strike or a dose-rate pulse while it’s still a netlist, not after it fails a radiation

SmartView: waveform viewer and analysis for circuit simulation A waveform viewer that measures what it plots, whether the result is streaming live from SmartSpice or sitting in an HSPICE, Spectre

SmartSpice Pro: FastSPICE simulation for SRAM and display designs Transient simulation for memory arrays and TFT display panels with millions of elements. Results stay close to SPICE accuracy, on the

Analog and Custom IC Design Silvaco’s analog IC design tools take your circuit from first schematic through layout, DRC and LVS, parasitic extraction and variation analysis to signoff, in one