C-PHY/D-PHY Combo
MIPI C-PHY and D-PHY combo IP: one interface, both standards
Silvaco’s C-PHY/D-PHY combo IP is one PHY for either standard, built for SoC architects who don’t want to lock a camera or display link to one physical layer before tape-out.
C-PHY/D-PHY combo IP parts, by foundry and process
Pick your foundry and node and see which configurations are already in silicon. The most advanced nodes in the Mixel catalog sit in this family. TSMC N5 and N6 are here, and no D-PHY-only or C-PHY-only part reaches them.
| Foundry | Product Name | Features | Part Number | Grade |
|---|---|---|---|---|
| TSMC | C-PHY/D-PHY ECM Universal in TSMC N2P | Supports MIPI C-PHY and MIPI D-PHY, 1T/1L, 3.0Gsps/3.0Gbps | ||
| TSMC | C-PHY/D-PHY Combo DSI TX+ in TSMC N5 | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo CSI RX+ in TSMC N5 | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 RX+ in TSMC N6 | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 6.0Gsps/4.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY combo CSI-2 RX in TSMC N7 | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 16FFC | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo DSI RX+ in TSMC 16FFC | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/6.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo Universal in TSMC 16FFC | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 8.0Gsps/6.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 RX+ in TSMC 16FFC | Supports MIPI C-PHY and MIPI D-PHY, 1T/1L, 1.5Gsps/1.5Gbps | ||
| TSMC | C-PHY/D-PHY Combo DSI RX in TSMC 22ULP | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 2.5Gsps/2.5Gbps | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 TX in TSMC 22ULL | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 2.5Gsps/2.5Gbps | ||
| TSMC | C-PHY/D-PHY Combo Universal in TSMC 22ULP | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 TX in TSMC 28HPC+ | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps | ||
| ST | C-PHY/D-PHY Combo CSI-2 TX+ in ST 28FDSOI | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 3.5Gsps/2.5Gbps, full-speed internal loopback testability | ||
| ST | C-PHY/D-PHY Combo CSI-2 TX+ in ST 40LP | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 3.5Gsps/2.5Gbps, full-speed internal loopback testability | ||
| ST | C-PHY/D-PHY Combo CSI-2 TX+ in ST 40LP | Supports MIPI C-PHY and MIPI D-PHY, 2T/2L, 3.5Gsps/2.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 TX in TSMC 40ULP | Supports MIPI C-PHY and MIPI D-PHY, 2T/2L, 1.5Gsps/1.5Gbps | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 40ULP | Supports MIPI C-PHY and MIPI D-PHY, 1T/1L, 2.5Gsps/2.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 40ULP | Supports MIPI C-PHY and MIPI D-PHY, 2T/2L, 2.5Gsps/2.5Gbps, full-speed internal loopback testability | ||
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 65LP | Supports MIPI C-PHY and MIPI D-PHY, 1L/1T, 1.5Gsps/1.5Gbps, full-speed internal loopback testability |
3T/4L means three C-PHY trios and four D-PHY lanes, and rates read in the same order, C-PHY per trio first. Parts marked + (TX+, RX+) add full-speed loopback. The newest part, an N2P Universal released in May 2026, is available now, so ask for its datasheet too. Targeting a different foundry or node? Ask an IP specialist, because more processes are in development.
Where running both standards matters
Camera and display links supporting both standards
Your camera or panel supplier picks the standard. The same SoC takes CSI-2, or DSI and DSI-2, over whichever PHY they chose.
Designs with mixed-source sensors
Qualify a second sensor with a different PHY without adding another PHY block to the die.
Automotive camera systems
Automotive-grade versions exist on TSMC N5, 22ULL and 28HPC+, for ADAS and in-cabin camera links.
Proof you can check before you license
Mixel was first to put both D-PHY and C-PHY in real silicon, and has been a contributing MIPI Alliance member
since 2006. Each part names its foundry and process, which makes
coverage a lookup rather than a sales conversation.
Since 2006
MIPI Alliance member
TSMC · ST
the foundries behind every combo part
N5 to 65LP
eleven processes in the combo catalog
8.0 Gsps · 6.5 Gbps
C-PHY per trio and D-PHY per lane, on the TSMC 16FFC Universal
10 TSMC nodes
where Mixel MIPI PHY IP is silicon-proven, as of May 2026
Press release
May 2026
Combo Universal IP on TSMC N2P
On N2P, the combo Universal carries 3.0 Gsps per trio in C-PHY v2.1 mode. In D-PHY v3.6 embedded clock mode it moves 3.0 Gbps per lane over two wires, matching a standard combo’s throughput on 25% fewer wires. That counts when every wire has to fit inside an AR glasses frame.
“Mixel, now part of Silvaco, has long been a valued contributing member of the MIPI Alliance. It is great to see these two companies combining their strengths to deliver MIPI C-PHY and D-PHY solutions on TSMC’s advanced N2P process.”
Hezi Saar, chair of MIPI Alliance
Customer · Mixel MIPI D-PHY IP
November 2025
indie
indie needed MIPI IP that could meet automotive requirements for its radar processors and MMICs. Mixel supplied ASIL-B D-PHY CSI-2 transmit and receive IP, with certified functional safety deliverables and the safety manual that goes with them.
“We needed a MIPI IP provider that could support our strict automotive requirements to further our radar portfolio and enable efficient and scalable ADAS architecture solutions. Through our long-standing partnership with Mixel and their extensive automotive experience, we had full confidence in Mixel’s capabilities and reliability. We are looking forward to our continued collaboration.”
Peter Gulden, EVP Radar Systems and Software, indie
Catalog · PDF
Summer 2026
PRO IP product selection guide
Combo part numbers sorted by foundry and node, each graded commercial, industrial or automotive, N2P included.
Press release
March 2026
Mixel MIPI PHY IP now available as PRO IP
Production Ready Offerings cover the combo as a dual-mode C-PHY v2.1 and D-PHY v3.5 PHY, in TX, RX, TX+, RX+ and Universal form.
Check your node with an IP specialist
Send the process and configuration you’re planning around. An IP specialist will confirm coverage, then go through licensing terms and deliverables for the C-PHY/D-PHY combo with you.
C-PHY/D-PHY combo IP questions
What is a C-PHY D-PHY combo PHY?
A MIPI combo PHY is a single physical layer with two modes, C-PHY and D-PHY. C-PHY mode drives up to three trios at v2.1, and D-PHY mode up to four lanes at v3.5. It carries CSI-2 for cameras and DSI or DSI-2 for displays. Each part works as primary or secondary, in TX, RX, TX+, RX+ or Universal form.
Why not use two separate PHYs?
Because you’d pay twice for the same circuitry. In C-PHY mode the combo runs on the D-PHY’s own blocks, and both modes share one set of serial interface pins. That’s one block to integrate and one pin budget, whichever standard your partner uses.
What does it cost in area?
That depends on the part and the process, so ask for the datasheet of the configuration you’re considering. The overhead over a plain D-PHY stays small. C-PHY mode reuses the D-PHY blocks, the pins are shared, and full-speed loopback adds little area on TX+, RX+ and Universal parts.
Which foundries and nodes are available?
The catalog covers TSMC N5, N6, N7, 16FFC, 22ULP, 22ULL, 28HPC+, 40ULP and 65LP, plus ST 28FDSOI and 40LP. An N2P Universal joined in May 2026. Automotive grade is offered on three of them: N5, 22ULL and 28HPC+. If your process isn’t listed, ask.
What data rates are supported?
The fastest part, the TSMC 16FFC Universal, reaches 8.0 Gsps per trio as C-PHY and 6.5 Gbps per lane as D-PHY. Entry parts run at 1.5 Gsps and 1.5 Gbps. Past 1.5 Gbps per lane, D-PHY needs deskew calibration, and the combo has it built in.
Which parts include testability?
Every TX+, RX+ and Universal part. Each carries full-speed internal loopback, so you can test at speed in high-volume manufacturing. Plain TX and RX parts don’t include it, so choose a + or Universal part if production test matters to your program.
Related
MIPI D-PHY
D-PHY alone, on TSMC, GlobalFoundries, Samsung, Tower and UMC processes.
MIPI C-PHY
C-PHY alone, on TSMC 22ULL and 40ULP.
Multi-Standard
Both combo families: C-PHY/D-PHY and LVDS/D-PHY.
Testability
D-PHY TX+ and RX+, each with full-speed loopback for production test.