Implementation of a new ferroelectric capacitance model from Ramtron International Corporation into SmartSpice was first described in the April 2002 issue of Silvaco Simulation Standard. This model utilizes a new

Version 7.0 of the University of Florida Silicon-On-Insulator (UFSOI), released in 2002, is now available with Silvaco SmartSpice by setting LEVEL to 21. SmartSpice uses version 7 by default, but

Silvaco SmartSpice simulation results are typically stored in RAM. Since transient simulations of large circuits often exceed 1GB, a large swap-space partition is required prior to simulation. Constant disk access

One of the methods to define a Voltage Controlled Oscillator (VCO) in a SPICE simulation is to make use of a voltage-controlled voltage source (E element). A typical VCO expression

Level=36 RPI poly-Si TFT and other original TFT models do not support automatic geometry binning. The enhanced model included with SmartSpice 1.9.7.C or later now supports the selecting of a