D-PHY TX+
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Mixel D-PHY TX+: D-PHY transmitter with full-speed loopback test
D-PHY TX+ pairs Mixel’s MIPI D-PHY transmitter with a receiver of its own, so when your SoC drives the camera or display link, you can prove the transmit side at full speed on the tester and again in the field.
Why a transmitter carries its own receiver
Designing the receiving end instead? D-PHY RX+ builds the same full-speed test into the receiver.
What it does
The TX+ sends its own high-speed output back into a receiver inside the PHY and checks it at the full data rate. That path is walled off from the serial pins, so whatever sits on your board can’t skew the result. You test the complete IP on the tester, and again once the chip is running in its system. Automotive and medical programs increasingly ask that of a MIPI link. Mixel reports 100% coverage of the hard macros. So first silicon gives you a transmit-side answer before anyone builds a board around it.
What it saves
On a standard D-PHY, a full-speed test needs the Universal configuration. You pay area for high-speed and low-power receivers that sit idle once your part ships. TX+ gets the same test with roughly 30% less area and 40% less leakage power than Universal, on Mixel’s figures. You also get lighter capacitive loading on the high-speed pins, which leaves headroom for higher data rates.
What it costs
Around 10% extra area over a plain D-PHY transmitter. That’s the receiver. Mixel gives no figure for what it saves you on the tester. Bring your test flow to an IP specialist and work it through for your case.
D-PHY TX+ parts
Sixteen parts carry a D-PHY TX+ today, across three standards: MIPI D-PHY, C-PHY/D-PHY
combo and LVDS/D-PHY combo. Find yours by foundry, node, standard or protocol.
| FOUNDRY | PART NAME | FEATURES |
|---|---|---|
| TSMC | D-PHY CSI-2 TX+ in TSMC 22ULL | Supports MIPI D-PHY, 4L, 2.5Gbps, full-speed internal loopback testability |
| GlobalFoundries | D-PHY DSI TX+ in GF 22FDX+ | Supports MIPI D-PHY, 2L, 2.5Gbps, full-speed internal loopback testability |
| TSMC | D-PHY CSI-2 TX+ in TSMC 28HPC+ | Supports MIPI D-PHY, 4L, 2.5Gbps, full-speed internal loopback testability |
| Samsung | D-PHY DSI TX+ in Samsung 28FDSOI | Supports MIPI D-PHY, 4L, 1.5Gbps, full-speed internal loopback testability |
| TSMC | D-PHY CSI-2 TX+ in TSMC 40ULP | Supports MIPI D-PHY, 1L, 1.5Gbps, full-speed internal loopback testability |
| TSMC | D-PHY CSI-2 TX+ in TSMC 40ULP | Supports MIPI D-PHY, 4L, 1.5Gbps, full-speed internal loopback testability |
| TSMC | D-PHY CSI-2 TX+ in TSMC 90LP | Supports MIPI D-PHY, 4L, 2.5Gbps, full-speed internal loopback testability |
| TSMC | C-PHY/D-PHY Combo DSI TX+ in TSMC N5 | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps, full-speed internal loopback testability |
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 16FFC | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 4.5Gsps/4.5Gbps, full-speed internal loopback testability |
| ST | C-PHY/D-PHY Combo CSI-2 TX+ in ST 28FDSOI | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 3.5Gsps/2.5Gbps, full-speed internal loopback testability |
| ST | C-PHY/D-PHY Combo CSI-2 TX+ in ST 40LP | Supports MIPI C-PHY and MIPI D-PHY, 3T/4L, 3.5Gsps/2.5Gbps, full-speed internal loopback testability |
| ST | C-PHY/D-PHY Combo CSI-2 TX+ in ST 40LP | Supports MIPI C-PHY and MIPI D-PHY, 2T/2L, 3.5Gsps/2.5Gbps, full-speed internal loopback testability |
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 40ULP | Supports MIPI C-PHY and MIPI D-PHY, 1T/1L, 2.5Gsps/2.5Gbps, full-speed internal loopback testability |
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 40ULP | Supports MIPI C-PHY and MIPI D-PHY, 2T/2L, 2.5Gsps/2.5Gbps, full-speed internal loopback testability |
| TSMC | C-PHY/D-PHY Combo CSI-2 TX+ in TSMC 65LP | Supports MIPI C-PHY and MIPI D-PHY, 1L/1T, 1.5Gsps/1.5Gbps, full-speed internal loopback testability |
| GlobalFoundries | LVDS/D-PHY DSI TX+ combo in GF 22FDX+ | Supports MIPI D-PHY and LVDS, 4CH/4L, 1039.5Mbps/2.5Gbps, full-speed internal loopback testability |
| No results found | ||
L is D-PHY data lanes, T is C-PHY trios and CH is LVDS channels, with rates given per lane, trio or channel. The “+” in
every TX+ part name means full-speed internal loopback testability. Your process isn’t listed? Talk to an IP specialist
Where a transmit-side test earns its area
Production test of D-PHY transmitters
Screen every transmitter at its full data rate before the part leaves the tester.
Silicon bring-up
Run diagnostics on the link inside the system while a new chip comes up.
Designs with no external tester access to the interface
The loopback lives inside the PHY, so you can check the transmitter without probing its pins.
Proof you can check
Before you commit area to a test feature, you’ll want the numbers. And a customer that’s already built Mixel D-PHY IP into its products.
16
D-PHY TX+ parts at TSMC, GlobalFoundries, Samsung and ST
~30% · ~40%
less area and leakage power than a D-PHY Universal
~10%
more area than plain D-PHY TX
100%
test coverage of the hard macro blocks, per Mixel
Customer · Mixel MIPI D-PHY IP
November 2025
indie
indie designs automotive radar processors and MMICs. Mixel supplied its ASIL-B MIPI D-PHY CSI-2 transmitter and receiver IP. It came with functional safety deliverables, a safety manual and characterization against the MIPI D-PHY conformance test suite.
“We needed a MIPI IP provider that could support our strict automotive requirements to further our radar portfolio and enable efficient and scalable ADAS architecture solutions. Through our long-standing partnership with Mixel and their extensive automotive experience, we had full confidence in Mixel’s capabilities and reliability. We are looking forward to our continued collaboration.”
Peter Gulden, EVP Radar Systems and Software, indie
Catalog · PDF
Silvaco PRO IP catalog
Mixel’s production-ready PHYs next to the rest of Silvaco’s PRO IP portfolio, in one download.
Which TX+ part fits your node?
Tell an IP specialist your foundry, your node and which end of the link you’re driving.
You’ll hear which D-PHY TX+ part fits and what the loopback covers in your flow. Ask about
licensing in the same conversation. Your first year of support comes with the
license. The engineers who designed the PHY handle it.
Questions about D-PHY TX+
What is D-PHY TX+?
D-PHY TX+ is Mixel’s proprietary version of the MIPI D-PHY transmitter, built for CSI-2, DSI and DSI-2 applications. A receiver sits inside the PHY next to the transmitter. That lets you run a full-speed loopback test in production, then again inside the finished product. Mixel is part of Silvaco.
What is full-speed internal loopback?
It’s a test path inside the PHY. The transmitter’s high-speed output feeds the built-in receiver, which checks the data at the full link rate. Because the loopback is isolated from the serial interface pins, board-side loading stays out of the measurement. Mixel rates its test coverage of the PHY’s hard macros at 100%.
What does testability save in production test?
Mixel measures TX+ at about 30% smaller than a standard D-PHY in its Universal configuration. Leakage power drops by about 40%. Universal gets its full-speed test by carrying extra high-speed and low-power receivers. Test-time and tester-cost savings depend on your flow, and Mixel hasn’t put a number on them.
Does it cost area or power?
Area, yes: roughly 10% over a plain D-PHY transmitter, because the receiver has to live somewhere. Against a Universal PHY, TX+ is the smaller and lower-leakage option, by about 30% and 40% respectively. For the plain transmitter, Mixel quotes the area difference only, with no power figure.
Which parts include TX+?
Of the sixteen D-PHY TX+ parts on the Silvaco catalog, eight are C-PHY/D-PHY combo transmitters, seven are MIPI D-PHY transmitters and one is an LVDS/D-PHY combo. Each lists “full-speed internal loopback testability” among its features. The TX+ configuration also exists for C-PHY alone, as the C-PHY CSI-2 TX+ in TSMC 40ULP.
Which foundries and nodes are available?
TSMC offers the widest spread: N5, 16FFC, 22ULL, 28HPC+, 40ULP, 65LP and 90LP. GlobalFoundries covers 22FDX+, Samsung 28FDSOI, and ST both 28FDSOI and 40LP. Working on a process that isn’t among them? A Silvaco IP specialist can tell you where TX+ stands on your node.