Yearly Archives: 2026

Home > Search Results For

2026

Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.

Resources Hub
Products Hub

1 week ago

005_verilog-a_cap : Verilog-A simple Capacitor

Requires: SmartSpice & Smartview Minimum Versions: SmartSpice 3.6.8.R This example shows how to implement a capacitor in Verilog-A and compares the waveform in a simple circuit transient simulation with a

1 week ago

006_ibis_buffer : IBIS Buffer

Requires: SmartSpice & Smartview Minimum Versions: SmartSpice 3.16.12.R A simple buffer with input/output signals is required. No example available at the moment. Input Files buffer_test.in Silvaco test deck for series_switch

1 week ago

007_runtime_expression : Runtime Expression evaluation

Requires: SmartSpice & Smartview Minimum Versions: SmartSpice 3.16.12.REAC functionality here ! No example available at the moment. Input Files 6tr1cap_runtime.in 6TR1cap .OPTIONS DCGMIN=1E-18 .OPTIONS GMIN=1E-18 .options post=2 probe rawpts=800 nomod

1 week ago

008_soa_operation : Safe Operating Area (SOA) opration

Requires: SmartSpice & Smartview Minimum Versions: SmartSpice 3.16.12.R GUI functionality to free up more memory by terminating programs etc. No example available at the moment. Input Files soa_bsim4.in * BSIM4

1 week ago

009_process_corners : Simulating over Process corners

Requires: SmartSpice & Smartview Minimum Versions: SmartSpice 3.16.12.R No example available at the moment.

1 week ago

010_encryption : Encryption of Models for IP protection

Requires: SmartSpice & Smartview Minimum Versions: Gateway 2.12.8.R, SmartSpice 3.16.11.R Sencypt functionality for both individual lines and whole files. No example available at the moment.

1 week ago

011_hierarchical : Inverter-equivalent Design (4-Bit Carry Look Ahead Adder)

Requires: SmartSpice & Smartview Minimum Versions: SmartSpice 4.18.16.R and SmartView 2.32.5.R This hierarchical design example demonstrates inverter-equivalent implementation of complex gates connected as a 4-Bit Carry Look Ahead (CLA) Adder

1 week ago

001_Display_driver : Panel Display Driver Loading

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 4.30.5.R In a flat Panel display the driver circuit has to switch cells via long connection lines with parasitic elements that degrade and

1 week ago

002_Driver_Stimulus : Driver stimulus to circuit.

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 4.30.5.R In a flat Panel display there maybe many lines to drive depending on panel size. You can setup a pulsed source for

1 week ago

001_autostop : Auto-Stop feature to save time

Requires: SmartSpice & Smartview Minimum Versions: SMARTSPICE 3.16.12.R The example shows an ability to cut-off simulation time using AUTOSTOP option. The simulation is stopped at the moment when all the