Managing SmartSpice / SmartView Simulation Output Raw Files

Introduction

Silvaco SmartSpice simulation results are typically stored in RAM. Since transient simulations of large circuits often exceed 1GB, a large swap-space partition is required prior to simulation. Constant disk access may dramatically decrease simulation speed, therefore shifting some or all of the load to the system’s memory helps to alleviate this problem.

Unfortunately, over-reliance on memory may also produce negative results and slow simulation time. In addition, it may be impossible to view intermediate results if a simulation runs for several days in RAM. These intermediate results help the user to decide whether or not to abort a simulation early.