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TFT_ex07.in : Amorphous IGZO TFT Simulation 2. Simulation v.s Experiment

TFT_ex07.in : Amorphous IGZO TFT Simulation 2. Simulation v.s Experiment

TFT_ex07.in : Amorphous IGZO TFT Simulation 2. Simulation v.s Experiment

Every software package contains a full set of examples suitable for that version and are installed with the software. If you see examples here that are not in your installation you should consider updating to a later version of the software. These examples can be used by beginners and advanced users for product evaluation, teaching purposes, and self-training.

Required Modules

Victory Process:

  • 2D Core Simulator

Victory Mesh:

  • 2D Meshing

Victory Device:

  • 2D Simulator
  • 2D TFT

This example performs Id/Vgs, Id/Vd, and CV simulations of TFT device with material properties corresponding to amorphous IGZO (indium gallium zinc oxide) material and show comparison with published experiment data. Measured a-IGZO material DOS (density-of-state) by CV analysis is inserted into simulation input and show almost the same transfer curve and output curve behaviour.

The example shows:

Structure formation using Victory Process syntax

Material and model settings for passivated IGZO

DOS(Density Of State) in a-IGZO bulk and at interface between IGZO and gate insulator

Forward Id/Vgs characteristics and comparison with experiment

Output Id/Vds characteristics and comparison with experiment

Multi-frequency CV characteristics with extracted DOS(Density Of State)

The key command in a-IGZO:TFT simulation is the Source/Drain Schottky barrier and height. This is done by proper workfunction of source/drain metal and activated by model UST (Universal Schottky Tunneling Model). gate metal and both S/D metal have the same workfunction=5.0 eV.

DOS-defects/intdefects statement. It is used to define a continuous density of trap states in the a-IGZO active channel and the relevant trapping cross-sections. Also, bottom interface fixed charge. For this purpose, we used C-interpreter function to define DOS in IGZO active channel region.

IDVG/IDVD DC Analysis: the Id/Vgs and Id/Vd ramping is done in a similar manner to the threshold voltage tests for MOS devices described in the MOS examples.

CV-analysis: the Cgs and Cgd are simulated and compared to published data for each frequency.

The experimental data were extracted from published paper [1].

Reference: [1] Yongsik Kim, et al., Amorphous InGaZnO thin-film transistors – Part I: Complete Extracton of Density of States Over the Full Subband-Gap Energy Range, IEEE Transactions On Electron Devices, Vol. 59, No. 10, Oct 2012

Images

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