Every software package contains a full set of examples suitable for that version and are installed with the software. If you see examples here that are not in your installation you should consider updating to a later version of the software. These examples can be used by beginners and advanced users for product evaluation, teaching purposes, and self-training.
Required Modules
Victory Device:
- 2D Simulator
- 2D TFT
This file performs Id/Vgs and Id/Vd simulations of a TFT device with material properties corresponding to amorphous IGZO (indium gallium zinc oxide) material. The example shows:
Structure formation using Victory Device syntax
Material and model settings for passivated IGZO
Forward Id/Vgs characteristics
On state Id/Vds characteristics
The key command in TFT simulation is the defect statement. It is used to define a continuous density of trap states in the silicon and the relevant trapping cross-sections.
The Id/Vgs and Id/Vd ramping is done in a similar manner to the threshold voltage tests for MOS devices described in the MOS examples. Results from this example are compared with published experimental data.
Reference: Fung, T., Chuang, C., Chen, C., Katsumi, A., Cottle, R., Townsend, M., Kumomi, H., and Kanicki, J., “Two-dimensional numerical simulation of radio frequency sputter amorphous In-Ga-Zn-O thin-film transistors “, J. Appl. Phys., 106, 084511 (2009)
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