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Adv_CMOS_ex14.in : 55nm CMOS Core Device SMT/CECL Stress Simulation

Adv_CMOS_ex14.in : 55nm CMOS Core Device SMT/CECL Stress Simulation

Adv_CMOS_ex14.in : 55nm CMOS Core Device SMT/CECL Stress Simulation

Every software package contains a full set of examples suitable for that version and are installed with the software. If you see examples here that are not in your installation you should consider updating to a later version of the software. These examples can be used by beginners and advanced users for product evaluation, teaching purposes, and self-training.

Required Modules

Victory Process

  • 2D Diffusion & Implantation
  • 2D Oxidation

Victory Mesh

  • 2D Meshing

Victory Device

  • 2D Simulator

Full flow from process to device simulation of CMOS 55nm Core Device
Process simulation:
Various process modules are integrated into a single flow
Calibration steps are included in comments
SMT/CECL modules and stress simulation included, with independent control flags.

Electrical Simulation:
Transfer Characterization with Strain Mobility (MVSM) model: IdVglin and IdVgsat Simulation
Parameter extraction: Vtgm/Vtlin/Idlin/Vtsat/Idsat/Idoff/DIBL Extraction

Images

Adv_CMOS_ex14_02.png
Adv_CMOS_ex14_01.png

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