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Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.
2 years ago
Silvaco Announces Pricing of Initial Public Offering
May 8, 2024
Custom News, Foundation IP News, Library News, Modeling News, News, Parasitics+Netlist News, SIPware News, SPICE News, TCAD News, Variation News
2 years ago
Silvaco Announces Expanded Partnership with Micron Technology
April 16, 2024
3 years ago
Silvaco Joins GaN Valley™, a Wide Bandgap Semiconductor Innovation Ecosystem in Europe
January 29, 2024
3 years ago
SilTerra Leverages Silvaco’s Library Characterization and Optimization Tools to Boost Efficiency in the Development of its Foundry Standard Cell IPs
July 6, 2023
Custom News, Foundation IP News, Library News, Modeling News, News, Parasitics+Netlist News, SIPware News, SPICE News, TCAD News, Variation News
5 years ago
Colin Shaw of Silvaco Named Si2 Pinnacle Award Winner
December 12, 2021
7 years ago
On-Chip Variation and the Sign-off Timing Flow: An Industry Perspective
As semiconductor technology advances, the impact of on-chip variation increases, which means more sophisticated solutions are required.
7 years ago
Silvaco Announces Viola 10X – An Order of Magnitude Faster Characterization for Nanometer Silicon
May 28, 2019
8 years ago
Challenges and Solutions of Nanometer Library Characterization
Graham Bell sits down with Bernardo Culau, Director of Characterization, to discuss the challenges and Solutions of Nanometer Library Characterization. They also discuss the webinar on the same topic. You
8 years ago
Nanometer Library Characterization: Challenges and Solutions
Nanometer Library Characterization: Challenges and Solutions Designers today see a significant increase in the number of simulations and PVT corners required to an accurate library characterization, including new formats to
8 years ago
Standard Cell Layout Migration and Optimization
Standard Cell Layout Migration and Optimization This webinar will present an efficient methodology for migrating and optimizing standard cell libraries. Foundation IP reuse through migration between non-disruptive technology nodes can