Requires: SmartSpice & Smartview

Minimum Versions: SMARTSPICE 3.17.26.C

This example
input deck will allow you to look at the following results.

The .LSTB analysis is used in common and differential mode

• phase_margin(deg)
• gain_margin(db)
• phase_margin_freq(Hz)
• gain_margin_freq(Hz)
• minfreq
• loop_gain_at_min_freq(db)

are calculated, and cx1,cx2 etc. files are written out, which contain gain as a function of frequency, and the CMDMPROBE technique is demonstrated.

Graphics

Input Files

lstb_fully_diff_opamp_cmdprobe.in

* ADCIN_FULLY_DIFF1.CIR - FULLY DIFFERENTIAL AMPLIFIER ADC DRIVER
******************************************************************
* DIFFERENTIAL SOURCE
.param  diffshift=0.00
VPOS	11	10	ac "diffshift" SIN(0V	+2VPEAK	1KHZ)
VNEG	12	10	SIN(0V	-2VPEAK 	1KHZ)
*
* COMMON MODE VOLTAGE
VCM	10	0	DC	0V
*VCM	10	0	SIN(0V	1VPEAK	10KHZ)
*
VREF	5	0	DC	0V
*
R1	12	2	10K
R2	2	3	10K
R3	11	1	10K
R4	1	4	10K
*XOP1	1 2 3	4 5	FULLYDIFF1	

vprobe1  v+  3  0
vprobe2  v-  4  0 
XOP1	1 2 v+	v- 5	FULLYDIFF1

c2 2 3 3p
c4 1 4 3p
	
*
* FULLY DIFF AMP MODEL ********************************
*                   vip vin vop von vcm_set
.SUBCKT FULLYDIFF1  1   2   3   4   5
* INPUT IMPEDANCE
RIN	1	2	10MEG
* OUTPUT VOLTAGES
EOUTP	3 7	VALUE = { V(1,2) * +100000/2 }
EOUTN	4 7	VALUE = { V(1,2) * -100000/2 }

* COMMON-MODE OUTPUT - SERVO AMP
ECM	7 0	5 6	1e6
RCM1	3	6	1MEG
RCM2	4	6	1MEG
RCMOUT	7	0	1MEG
RCMIN	5	0	1MEG
*
.ENDS
********************************************************
*
* ANALYSIS 
*.TRAN 	0.01MS  2MS

.lstb dec 30  .1 100meg mode=diff probe=vprobe1,vprobe2  
.print ac LSTB(DB)
 
.option nomod  nodeck 
*.probe
*.alter 
*.lstb dec 30  .1 100meg mode=comm probe=vprobe1,vprobe2  

.END

lstb_fully_diff_opamp_cmdprobe.measure.raw0

Title: ADCIN_FULLY_DIFF1.CIR - FULLY DIFFERENTIAL AMPLIFIER ADC DRIVER
Input deck file name: V:\examples\smartspice_web\analysis\006_stability_lstb_sim\lstb_fully_diff_opamp_cmdprobe.sp
Date: Mon Nov 04 13:47:27 2019
Plotname: Measure Plot
Temperature: 0
Sweepvar: phase_margin(deg)
Sweepmode: 0
Flags: real padded
No. Variables: 6
No. Points: 1         
Source: SmartSpice,Platform:0
Version: 4.38.1.R
Variables:	0	phase_margin(deg)	notype
	1	gain_margin(db)	notype
	2	phase_margin_freq(Hz)	notype
	3	gain_margin_freq(Hz)	notype
	4	minfreq	notype
	5	loop_gain_at_min_freq(db)	notype
Values:
 0	1.797693134862316e+308
	1.797693134862316e+308
	1.797693134862316e+308
	1.797693134862316e+308
	1.000000000000000e-001
	9.397071853713993e+001

lstb_fully_diff_opamp_cmdprobe.measure.raw1

Title: ADCIN_FULLY_DIFF1.CIR - FULLY DIFFERENTIAL AMPLIFIER ADC DRIVER
Input deck file name: /main/alpha/examples/smartspice_web/analysis/006_stability_lstb_sim/lstb_fully_diff_opamp_cmdprobe.sp
Date: Thu Jan 17 09:03:57 2013
Plotname: Measure Plot
Temperature: 0
Sweepvar: phase_margin(deg)
Sweepmode: 0
Flags: real padded
No. Variables: 6
No. Points: 1         
Source: SmartSpice MultiCore,Platform:0
Version: 3.18.0.R
Variables:	0	phase_margin(deg)	notype
	1	gain_margin(db)	notype
	2	phase_margin_freq(Hz)	notype
	3	gain_margin_freq(Hz)	notype
	4	minfreq	notype
	5	loop_gain_at_min_freq(db)	notype
Values:
 0	1.797693134862316e+308
	1.797693134862316e+308
	1.797693134862316e+308
	1.797693134862316e+308
	1.000000000000000e-01
	-9.397089242690984e+01

006_lstb_stability_diff

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