Daily Archives: September 3, 2020
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September 3, 2020
Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.
6 years ago
Improvement of Parasitic Capacitance Extraction Rules for Large-Scale Layout and Its Accuracy Verification Method
September 17, 2020 | 13:00 – 13:30 (JST) The accuracy of rule-based full-chip parasitic capacitance extraction tools including Silvaco's Hipex is highly dependent on the description of the rule files.
6 years ago
Choosing the Right DDR Memory Subsystem for Your Next SOC!
October 13, 2020 | 10:00 am – 10:30 am (PST) As computation requirements continue to build and memory systems are operating at ever higher frequencies, high-performance memory subsystems that consume