Testimonials

We analyze quantitatively the real impact of technology on the needed level for carrier transport modeling. The results, based on theoretical analyzes, are applied to existing devices. This work shows

This article presents a high frequency SPICE model parameter extraction method for CMOS devices. Current compact MOS models are developed for low frequency applications and provide good fits for DC,

New improvements have been added to Shur a-Si:H and Poly-Si Thin Film Transistors models. These enhancements include self-heating effect and a new charge conservation model.

This routine is a multitarget/geometry routine used to extract all kind of characteristics. There is the possibility to trace three different targets. This routine is based on full SMU definition.

For the UTMOST III versions greater than 17.2.0.R, the UTMOST users can measure the CJSWG (CJGATE) capacitance using the "CJ/CJSW" routine. The CJ/CJSW routine in MOS technology has been modified

Cross-Sectional Viewer is a tool within Expert to simulate the cross sectional view of ICs along an arbitrary drawn cut-line on the layout. Cross-sectional Viewer is a link between the

The functionality of several features of Expert layout editor has been enhanced to deal with hierarchical layouts in more convenient ways.

An important step in electronic circuit design is layout versus schematic verification (LVS)

Q: Often I need to measure big objects. It order to position the ruler precisely I must zoom in at one end, zoom out that zoom again in at the