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July 2003

Know how your circuit behaves across process variation before silicon tells you, with Monte Carlo-accurate results up to 30X faster.

23 years ago

HiSIM V1.2 Model Parameter Extraction with UTMOST-III

HiSIM (Hiroshima university STARC IGFET Model) is one of the surface potential based Spice models [1], [2] and pioneered the iterative approach to obtain the surface potential applicable in compact

23 years ago

Shallow-Trench-Isolation (STI) Effects in BSIM4 and HiSIM MOSFET Models in SmartSpice & UTMOST-III

There are several ways to account for the effect of STI-induced stress in standard compact models. The purpose of this article is to present two different approaches developed by the

23 years ago

Behavioral Modeling of PLL Using Verilog-A with SmartSpice

In this article, we describe practical behavioral modeling for highly non-linear circuits using Verilog-A, which is analog extension of Verilog-AMS. At first, we describe behavioral modeling techniques for phase/frequency detectors

23 years ago

Using Binned Device Models with SmartSpice

Q. My simulation fails because SmartSpice cannot find a binned model, what does this mean?