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Texturing is often used to improve light trapping in thin film solar cells. The textured surfaces act to scatter the light in oblique angles lengthening the optical path and effectively

High Voltage Power Devices using super junction or multi RESURF effect have a relatively high BV with a drastic reduction in the on-state resistance (Ron)[1-2]. Several Techniques such as buried

Vertical LOCOS (VLOCOS) power MOSFET structures are becoming increasingly popular [1-3] for 100 V rated applications due to their high packing density, superior temperature characteristics and low on-state resistance. It

Solar cells are experiencing a surge in activity due to concerns about sustainability of non-renewable resources and the negative impacts of global warming due to human activity.

One of the most important features of TCAD simulation is that the TCAD tools encapsulate the physics of the processes or devices being studied. For the user, this can develop

The simulation of stress during device fabrication is becoming increasingly important and is often now deliberately introduced during fabrication to enhance device performance. The induced stress can take the form

VICTORY DEVICE simulation framework includes tools for 1D, 2D and 3D simulation of modern semiconductor technologies. VICTORY DEVICE implements a full tetrahedral meshing engine for fast and accurate simulation of

We show full 3-Dimensional (3D) electrical and optical simulation of a tunable silicon-based Photonic Crystal (PhC) Chromatic Dispersion Compensator (CDC) with high power efficiency and ultra-low power consumption (114nW), operating

Semiconductor-Oxide-Nitride-Oxide-Semiconductor (SONOS) Non-Volatile memory structures can be simulated using ATLAS. The basic principle of these devices is the use of a charge trapping Silicon Nitride layer embedded in the oxide

Q: How can I get a CV curve of a MOSFET? And how can I get the current on all terminals? A: There are two methods to get the CV

The formation of deep p- and n- wells using high-energy implantation has become an integral part of CMOS technology process flow. The high energy and high dose implantation into the

The formation of isolation trenches is one of the key process steps used in power device fabrication. Also the intensive scaling of modern semiconductor devices requires significant stress engineering to