SURGE Virtual Event EMEA 2025
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Concluded event
SURGE Virtual Event EMEA 2025
EMEA · Tuesday, January 21, 2025 · Virtual event
At a glance
January 21, 2025
Date
EMEA
Region
Virtual
Format
19
Sessions in 3 tracks
About this event
SURGE EMEA 2025 was a single online day, Tuesday, January 21, 2025. Its 20 talks ran from quantum transport in 5nm nanowire transistors to the CAN XL automotive bus.
SURGE is the event Silvaco organizes for its own users. In EMEA, three companies brought results from their own work: Ciena on quantum transport, SilTerra on library characterization and Silicon Creations on parasitic reduction. Stanford and TU Wien added the academic side. Silvaco’s side of the program covered the CEO keynote and engineering updates across TCAD, EDA and IP. Board member Wally Rhines spoke on AI in EDA.
Tracks
- General Session
- Semiconductor Process and Device Track (TCAD)
- IC Design Track (EDA and IP)
Agenda
Recordings for all 20 SURGE North America 2025 talks sit on Silvaco’s support site. To open
one, sign in there or complete a short form with a work, university or government email.
General Session
公司最新进展
Babak Taheri 博士,Silvaco,CEO及董事会成员
Speaker bio, January 2025
人工智能如何将EDA推向新高度
Wally Rhines,Cornami 总裁及CEO、Silvaco董事会成员
Speaker bio, January 2025
半导体工艺和器件分会场
Keynote
Dr. Eric Guichard, SVP and GM of TCAD Business Unit, Silvaco
Abstract
Speaker bio, January 2025
Products: TCAD
AI Takes EDA to the Next Level
Wally Rhines, President and CEO of Cornami and Silvaco Board Member
Speaker bio, January 2025
Recordings for all 20 SURGE North America 2025 talks sit on Silvaco’s support site. To open
one, sign in there or complete a short form with a work, university or government email.
Semiconductor Process and Device Track (TCAD)
TCAD Update
Dr. Eric Guichard, SVP and GM of TCAD Business Unit, Silvaco
Abstract
Speaker bio, January 2025
Products: TCAD
NanoHub Workforce Development
Dr. Peter Griffin, Stanford University
Speaker bio, January 2025
Products: Jivaro Pro
Low-temperature Behavior in Nanowire Transistors by Quantum Transport Simulation
Sanam Moslemi-Tabrizi, Analog Engineer, Ciena
Abstract
Speaker bio, January 2025
Products: Victory Atomistic
Machine Learning for Multi-Scale Plasma Process Integration and Optimization
Associate Professor Dr. Lado Filipovic, TU Wien
Abstract
Speaker bio, January 2025
Associate Professor at TU Wien’s Institute for Microelectronics. The Christian Doppler Laboratory he directs there, which Silvaco supports, models device and sensor processes across scales. His group also works with Fuji Electric and Infineon, and studies 2D materials such as graphene and MoS2 for sensing. IEEE Senior Member; doctorate (2012) and habilitation (2020) from TU Wien.
How to Utilize Victory Analytics and Machine Learning to Calibrate TCAD Data
Dr. Stefania Carapezzi, Field Applications Engineer, Silvaco
Abstract
Speaker bio, January 2025
Products: Victory Analytics · Victory DoE
Applying Artificial Intelligence in Fab Technology Co-Optimization
Dr. Christian Caillat, TCAD Senior Staff FAE, Silvaco
Abstract
Speaker bio, January 2025
Products: FTCO
Utilizing Physics-Based AI-Powered Digital Twins to Accelerate Design Optimization and Manufacturing Yield of SiC Power Devices
Dr. David Green, TCAD Applications Engineer, Silvaco
Speaker bio, January 2025
Power Devices SPICE Modeling with a Detailed SiC DMOS Parameter Extraction Methodology
Dr. Bogdan Tudor, Head of Modeling, Silvaco
Abstract
Speaker bio, January 2025
IC Design Track (EDA and IP)
EDA and IP Updates
Ben Louie, VP and GM of IP Business Unit, Silvaco
Abstract
Speaker bio, January 2025
Products: Analog and Custom IC
EDA Solutions for Physical Design of Discrete Power Devices
Stefano Pettazzi, Staff Applications Engineer, Silvaco
Abstract
Speaker bio, January 2025
Products: Expert · SmartDRC/LVS
Accelerating the Verification of High-Frequency Analog Mixed-Signal Components via Jivaro Pro Advanced Parasitic Reduction
Chung-Chun Chen, Director of Analog Design, Silicon Creations
Speaker bio, January 2025
Products: Jivaro Pro
Using Viso to Investigate, Analyze and Solve Advanced Parasitics Issues
Carlos Berlitz, Corporate Applications Engineer, Silvaco
Abstract
Speaker bio, January 2025
Products: Viso
Standard Cells Characterization Challenges and Improvement
Siti Mariyam, IP Design Enablement, SilTerra
Abstract
Speaker bio, January 2025
Products: Standard Cell
Standard Cell Library IP in Advanced FinFET Nodes for Low Voltage Applications
Fernando Carrion, Design Engineer, Silvaco
Abstract
Speaker bio, January 2025
Products: Standard Cell
Advanced Node Library Development with Cello FinFET
Felipe Bortolon, Engineering Manager IP, Silvaco
Abstract
Speaker bio, January 2025
Products: Cello FinFET
Bandgap References for Low Voltage Operation
Ahmad S. Mazumder, Director of Engineering, Silvaco
Abstract
Speaker bio, January 2025
LDO For Low Voltage Operation
Shaikh A Shams, Staff Engineer, Silvaco
Abstract
Speaker bio, January 2025
Introduction to CAN-XL
Mauricio Brochi, Director of Automotive IP, Silvaco
Abstract
Speaker bio, January 2025
Products: Automotive IP
Themes at SURGE EMEA 2025
Three talks on SiC and discrete power: digital twins, DMOS SPICE extraction and curved-layout DRC
Quantum transport at Ciena, machine learning for plasma etch at TU Wien, and the Victory update
SilTerra’s characterization work, low-voltage FinFET libraries and Cello FinFET automation
Digital twins of fab process steps, and TCAD calibration using Victory DoE and Victory Analytics
Jivaro Pro at Silicon Creations, parasitic analysis in Viso, and the portfolio update