8 years ago
Expert is a powerful hierarchical layout editor suitable for a wide variety of design types: Analog, Mixed-Signal, RF, Optoelectronics and Flat Panel Displays (FPDs). It provides many useful features that
8 years ago
This webinar will present an efficient methodology for migrating and optimizing standard cell libraries. Foundation IP reuse through migration between non-disruptive technology nodes can save a lot of engineering resources
8 years ago
This webinar will provide an overview on methods and tools to review parasitic extractor results and to perform a number of analyses on the parasitic netlists. Parasitic extraction is an
9 years ago
This webinar will provide a discussion of the integration of iPDK design kits into the Gateway tool flow. iPDKs are fast becoming the prefered method for foundries to release process
10 years ago
Power integrity issues must be addressed as early in the design cycle as possible to avoid expensive design iterations. Layout engineers can use Silvaco’s InVar Prime to estimate EM, IR
10 years ago
Parasitic extraction is a mandatory step for physical design sign off, and at advanced nodes, parasitics substantially impact the behavior of circuit design. Any analysis must consider the interconnect parasitic
10 years ago
This webinar will provide an overview of Silvaco’s new reliability analysis tool InVar Prime. InVar Prime is an addition to the family of InVar power integrity signoff tools. It allows
11 years ago
This webinar will provide an overview for how circuit designers can use Silvaco’s schematic capture tool, Gateway and layout editor, Expert in an OpenAccess environment. OpenAccess has become the choice
11 years ago
This webinar will provide an overview of Silvaco’s power integrity and reliability analysis tool, InVar. InVar’s concurrent approach to simultaneously modeling power, voltage and temperature makes reliability analysis real world
12 years ago
3D integration of ICs and systems is enhancing cost scaling of “More than Moore” technology and applications. However 3D integration of heterogeneous systems and ICs presents significant challenges to future