SURGE Virtual Event EMEA 2022
Date
- GENERAL SESSION
- TCAD TRACK
- EDA TRACK
- IP SESSION
Agenda
GENERAL SESSION
Dr. Babak Taheri – CEO and Board Member – Silvaco, Inc.
Design and Optimization of Superconducting Circuits – Prof. Giovanni De Micheli, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland
Designing Extreme Scale Machine Learning Hardware - Patrick Groeneveld, Ph.D, Cerebras Systems
TCAD TRACK
TCAD Simulation Update – Dr. Eric Guichard, Silvaco, Inc.
Revised Mobility Model for Predictive TCAD Simulations of 4H-SiC – Hemant Dixit, Ph.D., Research Scientist, Wolfspeed, Inc.
TCAD as a Key Enabler for Photodiode Design – Sungwon Kong, Silvaco, Inc.
Advanced Flux Models in Victory Process: Low-Bias SF6 Etching and Thermal Atomic Layer Processing - Luiz Felipe Aguinsky, Researcher, Christian Doppler Laboratory for High Performance TCAD, Institute for Microelectronics, TU Wien
Behavior of FinFET at Very Low Temperatures and Creation of Qubits – Sanam Moslemi-Tabrizi, Hardware Engineer, Ciena
Victory Atomistic - Updates on 2D Materials, CNTs, and How We Bridge Atomistic Simulations and TCAD – Tillmann Kubis, Purdue University
Achieving Accurate Experimental Etch Profiles in FinFET and Memory Applications with Victory TCAD Solution – Alexander Toifl, Silvaco, Inc.
EDA TRACK
Analog Custom Design Update - Thomas Blaesi, Silvaco, Inc.
Advances in Device Modeling Using Utmost IV – Bogdan Tudor, Silvaco, Inc.
A Robust 3nm to 350nm Design Flow Utilizing Silvaco Tools - Chung-Chun Chen, Director of Analog Design, Silicon Creations
Advanced TFT-Based Flat Panel Design with SmartSpice - Jody Matos, Silvaco, Inc.
Silvaco SmartDRC/LVS: A Powerful, User Friendly and Flexible Layout Verification Solution – Richard Lum, CEO, MPics Innovations
VarMan Delivers Unprecedented High-Sigma Performance within a User-Friendly GUI Environment - Vincent Annezo, Silvaco, Inc.
Latest Update on Interconnect Parasitic Reduction and Analysis with Jivaro and Viso - Simon-Alexis Abric, Silvaco, Inc.
IP SESSION
Design IP Solutions Update – Ben Louie, Silvaco, Inc.
Challenges of Designing Quantum Computer SoCs – Jack Berg, VP of Operations, PsiQuantum
Implementing Debug for I3C – Ashish Senapati, Platform Debug Architect, Intel
Replacing an End-of-Life MCU - Errett Hogrefe, Senior Digital Design Engineer, Silvaco, Inc.
Standard Cells and I/O Library Optimization and Validation - Mr. Faris Amsyar Bin Ahmad Zhaki, IP Staff Engineer, SilTerra Malaysia Sdn. Bhd
Cello FinFET Standard Cell Synthesis - Dan Fitzpatrick, Silvaco, Inc.
Related
SURGE 2023, EMEA
November 21, 2023 · Virtual event
SURGE 2023,
Taiwan/Singapore
November 23, 2023 · Virtual event
SURGE 2023, Japan
November 28, 2023 · Live event
Events
The year's trade-show dates, IEDM and TSMC's forums among them