Minimum Required Versions: Expert 5.2407.0.R, Hipex 4.2407.0.R, SmartDRC 1.2407.0.R
Hipex can be configured to support multi-corner RC extraction.
The corners represent variations that occurred in circuit manufacture and exploiting conditions (such as process, voltage, temperature). For parasitic extractions, these variations are reflected by collection of typical RC-parameter sets (RC corners). Usually RC corners are described by similar extraction rules, but with different calculation coefficients.
Hipex performs efficient extraction for all defined corners in a single run.
This example demonstrates how to setup RC corners in Expert and perform multi-corner RC extraction using Hipex.
1: Start Expert, load GDS layout
– Run Expert Layout Editor 5.2407.0.R version with Hipex 4.2407.0.R: expert -V 5.2407.0.R -lpev:4.2407.0.R
– Import (menu File->Import… ) the file “hipex_ex18.gds” (cell “hipex_ex18”) along with the technology file “hipex_ex18.tcn”.
2: Load extraction settings
– Select Verification->Extraction->Setup command to open the “Layout Parameter Extraction Setup” dialog. Press the Load button, and choose the “setup.lpe” or “setup_js.lpe” file to load required extraction settings. The settings of the “setup_js.lpe” file utilizes JavaScript functions to calculate capacitance and resistance values, while the “setup.lpe” file employs LISA procedures for these calculations.
– Select the Parasitic Technology tab and make sure that the RC-corners group box is enabled. Verify that parasitic capacitance and resistance technology files are specified for each corner in the table, as shown in Figure1
, if the “setup.lpe” file has been loaded. The Add and Delete buttons are used to add or delete RC corners in the table. Capacitance and resistance technology files can be specified in the C-technology and R-technology columns of the table, correspondingly.
– Press the OK button to close the “Layout Parameter Extraction Setup” dialog.
3: Perform Hipex extraction
– Run netlist extraction (menu Verification->Extraction->Net->Run )
– Run RC extraction (menu Verification->Extraction->RC->Run )
– After running RC extraction, click the Open Netlist button to launch the “Netlist Editor” program, where you can view the netlists corresponding to the specified RC corners. In the “Netlist Editor”, navigate to the menu command Window->Windows to see/activate the set of extracted SPICE files for RC corners (see Figure2
).
Graphics
Input Files
hipex_ex18.tcn
TechnologyID = "Non-named technology, ver. 0.0"
Version = 101
Unit = "nm"
UnitValue = 1
Shapes
{
AllowOffGridWire = FALSE
AllowOffGridEllipse = FALSE
ApproximationType = POINTS
ApproximationValue = 20
AlignedY = FALSE
Circumscribed = FALSE
}
Layer
{
Name = "m3txt"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (255,255,0)
ColorName = "0"
GDS2Num = 10
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "m2txt"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (0,0,255)
ColorName = "0"
GDS2Num = 9
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "m1txt"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (255,255,0)
ColorName = "0"
GDS2Num = 8
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "cnt"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (0,0,255)
ColorName = "0"
GDS2Num = 7
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "rec3"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (255,170,0)
ColorName = "0"
GDS2Num = 6
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "rec2"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (255,85,0)
ColorName = "0"
GDS2Num = 5
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "rec1"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (255,0,127)
ColorName = "0"
GDS2Num = 4
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "m3"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (0,255,0)
ColorName = "0"
GDS2Num = 3
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "m2"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (0,255,255)
ColorName = "0"
GDS2Num = 2
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Layer
{
Name = "m1"
Wire
{
MiterAngle = 20
Width = 0
Joint = EXTEND
End = EXTEND
}
Stipple = "STP_H_BDIAG"
Color = (170,0,0)
ColorName = "0"
GDS2Num = 1
GDS2DataType = 0
Scope = FLAT
UseGridParams = FALSE
ScratchLayer = FALSE
EdgeLayer = FALSE
LineStyle = 0
}
Device
{
Type = "generic"
SpName = "g1"
Params = 0
DevLay
{
NameL = "rec1"
TypeL = REC
}
DevLay
{
NameL = "m1"
TypeL = PIN
}
GenericParam
{
Type = "BY_NET"
Pins = "p1"
}
}
Device
{
Type = "generic"
SpName = "g2"
Params = 0
DevLay
{
NameL = "rec2"
TypeL = REC
}
DevLay
{
NameL = "m2"
TypeL = PIN
}
GenericParam
{
Type = "BY_NET"
Pins = "p1"
}
}
Device
{
Type = "generic"
SpName = "g3"
Params = 0
DevLay
{
NameL = "rec3"
TypeL = REC
}
DevLay
{
NameL = "m3"
TypeL = PIN
}
GenericParam
{
Type = "BY_NET"
Pins = "p1"
}
}
Connect = ("m1","m2","cnt")
Connect = ("m3")
Attach = ("m1","m1txt")
Attach = ("m2","m2txt")
Attach = ("m3","m3txt")
GridParams
{
MinGridStep = 1
SnapCursorStepX = 1
SnapCursorStepY = 1
SnapDepend = 0
SnapCursorRatioX = 0
SnapCursorRatioY = 0
GridColor = (0,0,0)
GridType = 0
AutomaticGridType = 0
UserVisualGridStepX = 10
UserVisualGridStepY = 10
SuperGridStepX = 10
SuperGridStepY = 10
}
InstanceGridParams
{
MinGridStep = 0.1
SnapCursorStepX = 1
SnapCursorStepY = 1
SnapDepend = 0
SnapCursorRatioX = 0
SnapCursorRatioY = 0
GridColor = (0,0,0)
GridType = 0
AutomaticGridType = 0
UserVisualGridStepX = 10
UserVisualGridStepY = 10
SuperGridStepX = 10
SuperGridStepY = 10
}
NetToCap = ("m3","m3")
NetToCap = ("m2","m2")
NetToCap = ("m1","m1")setup.lpe
[BackannotateAndLVS]
Enable=0
LvsProject=
NetlistComparator=0
RunLVS=0
SchematicFile=
SmartNVNCompReportDir=
UseCellSettings=0
UseLvsProject=0
[BackannotateAndLVS/Cells]
Count=0
[Capacitance]
CouplingGroundThreshold=0
CouplingThreshold=0
ExtCurCupCoefs=tech/typ_c.lisa
GlobalVicinity=0
HierarchicalNetlist=hipex_ex18_c_hier.spice
NodeBasedExtraction=0
UseCurCupCoefs=0
UseIntPcapScript=0
[Cells]
Count=1
[Cells/Cell_0]
Bidirectional=
Clock=
Explosion=EXPLODE
Input=
Name=hipex_ex18
Output=
Reduction=0
[Connectivities/Connectivity_0]
Layers=m1, m2
Via=cnt
[Connectivities/Connectivity_1]
Layers=
Via=m3
[Connectivities/Connectivity_2]
Layers=m1
Via=m1txt
[Connectivities/Connectivity_3]
Layers=m2
Via=m2txt
[Connectivities/Connectivity_4]
Layers=m3
Via=m3txt
[Crc]
CellCount=1
[Crc/Cell_0]
Name=hipex_ex18
NetCount=0
[Crc/Cell_All]
ThresholdCap=-1
ThresholdRes=-1
[Crc/Cell_Top]
ThresholdCap=-1
ThresholdRes=-1
[Crc/Details]
DetailedDisplay=0
DetailedSummary=0
DisplayPartitions=0
TitleLine=0
[Crc/Input]
Directory=SPF
File=hipex_ex18.dspf
Format=DSPF
[Crc/Output]
Directory=CRC_Files
File=hipex_ex18.dspf.crc
Format=DSPF
[Crc/Reduction]
Authorize=0
CouplingMode=0
ParallelCheck=0
PortFile=
SerieCheck=0
[Erc/DangleNodes]
Netlist=0
Report=1
[Erc/Errors]
SoftcheckWarnings=0
[Erc/OpenNodes]
Rename=0
Short=0
[Erc/ShortedNodes]
GenerateName=0
MultilabelName=MULTILABEL
[Erc/Warnings]
BJT=0
MOSFET=1
[Explosion]
AutoExplode=0
CellArrayReduction=0
KeepFlattenCells=1
Wiring=0
[External]
CapacitanceUnit=pF
DeckBuildVersionForHipex=
LengthUnit=um
RCcornerCount=3
RCcorners=1
ResistanceUnit=Ohm
TernaryConnectThroughTouch=0
UseCurLayoutText=1
UseCurProcess=1
UseCurProcessCommon=1
UseCurProcessVictoryRCx=1
UseCurTechConnect=1
UseCurTechDevice=1
UseDerLayersDRCFile=1
UseIntDrcScript=0
UseIntLayoutTextScript=0
UseIntProcessScript=0
UseIntProcessScriptCommon=0
UseIntProcessScriptVictoryRCx=0
VictoryMeshVersionForHipex=
VictoryProcessVersionForHipex=
[External/RCcorner_0]
RCcornerCtechFile=tech/typ_c.lisa
RCcornerName=RCtyp
RCcornerRtechFile=tech/typ_r.lisa
[External/RCcorner_1]
RCcornerCtechFile=tech/max_c.lisa
RCcornerName=RCmax
RCcornerRtechFile=tech/max_r.lisa
[External/RCcorner_2]
RCcornerCtechFile=tech/min_c.lisa
RCcornerName=RCmin
RCcornerRtechFile=tech/min_r.lisa
[FsCExtraction]
CapMinValue=1e-20
ConductorFilter=0
Decomposition=1
DecompStep=0
DecompStepValue=-1
DomainLimitations=0
DomainLimitXmax=0
DomainLimitXmin=0
DomainLimitYmax=0
DomainLimitYmin=0
GridStepX=0.5
GridStepY=0.5
GridStepZ=0.5
MaxIterations=100
Precision=0.01
Renew=0
RenewSavedFile=RenewSavedFile.sav
Stellar3DStructFile=3DStructureFile.str
Stellar3DStructGeneration=0
[FsExtr_GlobalSettings/CapacitanceOptions]
Count=10
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption0]
Name=CAPsolver=
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption1]
Name=Cjunc=
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption2]
Name=Ground
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption3]
Name=userCAPchoice=
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption4]
Name=DomainBoundaryCondition=
Use=0
Value=Mirror
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption5]
Name=fast
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption6]
Name=accurate
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption7]
Name=fixDummyCharge
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption8]
Name=biasConductors
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption9]
Name=M2Iverysmall
Use=0
Value=
[FsExtr_GlobalSettings/CDloss]
Count=0
[FsExtr_GlobalSettings/ExtractionCapacitance]
AdaptCValue=0.04
CapAccuracy=3
MinCalValue=1e-19
UseAdaptC=0
UseCapAccuracy=0
UseMinCap=0
[FsExtr_GlobalSettings/ExtractionGeneral]
ExtractBoth=1
ExtractCap=1
ExtractRes=1
ExtractStructure=Contours
ExtractUseStructure=0
Model3D=1
RefineMax=0
RefineMaxValue=10
Tolerance=0
ToleranceValue=0
UseHEforCap=0
UseVEforRes=0
[FsExtr_GlobalSettings/ExtractionResistance]
AdaptRValue=0.04
External=0
MinResValue=0.01
ResAccuracy=1
UseAdaptR=0
UseMinRes=0
UseResAccuracy=0
[FsExtr_GlobalSettings/General]
CutlineArea_MaxX=0
CutlineArea_MaxY=0
CutlineArea_MinX=0
CutlineArea_MinY=0
SpecifyArea=0
TopCellName=
WorkArea_MaxX=0
WorkArea_MaxY=0
WorkArea_MinX=0
WorkArea_MinY=0
[FsExtr_GlobalSettings/JColumns]
Count=9
[FsExtr_GlobalSettings/JColumns/Column0]
Width=50
[FsExtr_GlobalSettings/JColumns/Column1]
Width=140
[FsExtr_GlobalSettings/JColumns/Column2]
Width=220
[FsExtr_GlobalSettings/JColumns/Column3]
Width=220
[FsExtr_GlobalSettings/JColumns/Column4]
Width=120
[FsExtr_GlobalSettings/JColumns/Column5]
Width=120
[FsExtr_GlobalSettings/JColumns/Column6]
Width=120
[FsExtr_GlobalSettings/JColumns/Column7]
Width=300
[FsExtr_GlobalSettings/JColumns/Column8]
Width=140
[FsExtr_GlobalSettings/Other]
DefaultCSV=
numPrecision=0
SendMailWhenFinish=0
ShowSpecifiedJobs=0
ShowStructureImg=2
UseCDloss=0
UserDefinedDecimalNumber=0
UserEMail=
WorkTemplate=%current_project%%current_cell%_#%order%
[FsExtr_GlobalSettings/Parallel]
AutoSelectParallelJobs=1
ParallelJobCount=1
ParallelMode=0
ReUseStructure=0
[FsExtr_GlobalSettings/ResColumns]
Count=7
[FsExtr_GlobalSettings/ResColumns/Column0]
Width=58
[FsExtr_GlobalSettings/ResColumns/Column1]
Width=47
[FsExtr_GlobalSettings/ResColumns/Column2]
Width=47
[FsExtr_GlobalSettings/ResColumns/Column3]
Width=64
[FsExtr_GlobalSettings/ResColumns/Column4]
Width=38
[FsExtr_GlobalSettings/ResColumns/Column5]
Width=120
[FsExtr_GlobalSettings/ResColumns/Column6]
Width=120
[FsExtr_GlobalSettings/SpecifyCleverVersion]
CleverVersion=3.10.15.R
SpecifyCleverVersion=0
[HdbGeneration]
AnnotatedGdsFile=
SmartLvsRuleFile=
UpdateCurrentTechnology=0
UseSmartLvsFiles=0
[HierViolatChecks]
Count=0
[Layout]
DelWhite=1
ExportAnnotate=0
FixedSize=0
Flatten=0
GlobalDatatypes=
Labels=0
NetFixedSize=0
NetLabels=0
Non45=0
Overlap=0
ParallelModeDeriv=1
Rebuild=0
SafeHierDerivation=0
SafeHierDerivType=1
ShortLabel=0
TopCell=hipex_ex18
TopLevel=0
TopTextDepth=1
[Layout/FixedSize]
Height=0
Width=0
[Layout/NetFixedSize]
NetHeight=0
NetWidth=0
[NodeName]
CaseSensitiveNetNames=0
GlobalNode=
GroundNode=GND
HierarchySeparator=/
InstancePrefix=I
NodeNameSeparator=_
NodePrefix=#
PinDelimiter=:
PowerNode=VDD
TopVirtualConnect=1
UseNdlInstNames=0
UseNdlNetNames=0
VirtualConnectNames=
VirtualNetFlag=0
VirtualNetSymbols=:
XY=0
[Output]
CommentModel=0
ExcludeLibraryPrefix=0
FlatNetlist=hipex_ex18_flat.spice
FlatNetlisting=0
GlobalsInSubcktPins=1
HierarchicalNetlist=hipex_ex18_hier.spice
Messages=0
NetlistLineLength=80
NetlistTextedPins=0
PModelOutput=0
SbcktPininfo=0
[Output/Parameters]
Capacitors=1
CapacitorsLw=0
LWOnly=0
Resistors=1
SdNoW=0
[Ports]
Count=0
[Project]
EditorVersion=5.2407.0.X
User=viktarm
[Rc]
CouplingMode=1
DeleteFloatingSubnets=0
DistributionMode=2
DspfOutput=1
DspfOutputDir=SPF
IgnoreNets=
Miller=1
ParallelMode=0
ProcessorNumber=16
RcGetCsv=0
RcGetDspf=1
RcGetSpef=0
RcGetSpice=1
RcIgnoredNets=1
RCReduction=0
SelectedNodesList=
SmallResistance=0.0001
SpefOutputDir=SPF
SpiceOutputDir=hipex_ex18_rc_hier.spice
SPM=1
SubCells=1
TauMin=0
TM=0
VictoryRCxParallelMode=0
VictoryRCxProcessorNumber=1
VictoryRCxVersion=
[Rc/OutputParameters]
DevicesAsInstances=0
ExtractDevices=0
Layer=0
SuppressSubcktEnds=0
XY=0
[Resistance]
ExtCurPresCoefs=tech/typ_r.lisa
HierarchicalNetlist=hipex_ex18_r_hier.spice
IgnoreDangles=0
IgnoreGround=1
IgnoreHierGlbNodes=
IgnoreNodes=
IgnorePower=1
OutputRDB=0
SelectedNodesList=
SerialMergeThreshold=0
SubNodeSep=~
Threshold=0
UseCurPresCoefs=0
UseFieldSolver=0
UseIntPresScrip=0
UseTextsAsSubnodes=0
[Resistance/Output]
LayerNames=1
LW=1
XY=1
[Resistance/OutputRDB]
Pins=0
TopOnly=0
[Stripes]
ActiveCollection=default
BoxSizeX=400
BoxSizeY=400
BoxVicinityX=50
BoxVicinityY=50
CapMappingFile=
CollectionsCount=1
DecompositionType=0
FsCExtract=0
FsCExtractMode=1
FsUtilizePreviousRuns=0
IncludeDangles=0
IncludeDummies=0
IncrementalCdbRdb=0
MnmBlockCount=0
MnmCExtract=0
StripeWidth=200
UseExternCapMapping=0
VicinityWidth=10
[Stripes/Collection_0]
BA_Names=0
IgnoredNets=0
Name=default
NetsCount=0
NetsList=
SelectedNets=0
SkipCells=0
SkipCellsFile=
TopOnly=0
TopOnlyNocells=0
[SubstrateExtraction]
BacksideConductivity=3.3e-10
BacksidePermittivity=6.2
BacksideThickness=10
IncludeBacksideModel=0
RunSipex=0
SiliconBackside=0
SiliconBacksideNode=cwsBackside
SiliconThickness=300
SipexManufacturingDatabase=
SipexVersion=
SpxTemperature=27
SubstrateExtractionMode=1setup_js.lpe
[BackannotateAndLVS]
Enable=0
LvsProject=
NetlistComparator=0
RunLVS=0
SchematicFile=
SmartNVNCompReportDir=
UseCellSettings=0
UseLvsProject=0
[BackannotateAndLVS/Cells]
Count=0
[Capacitance]
CouplingGroundThreshold=0
CouplingThreshold=0
ExtCurCupCoefs=tech/typ_c.lisa
GlobalVicinity=0
HierarchicalNetlist=hipex_ex18_c_hier_js.spice
NodeBasedExtraction=0
UseCurCupCoefs=0
UseIntPcapScript=0
[Cells]
Count=1
[Cells/Cell_0]
Bidirectional=
Clock=
Explosion=EXPLODE
Input=
Name=hipex_ex18
Output=
Reduction=0
[Connectivities/Connectivity_0]
Layers=m1, m2
Via=cnt
[Connectivities/Connectivity_1]
Layers=
Via=m3
[Connectivities/Connectivity_2]
Layers=m1
Via=m1txt
[Connectivities/Connectivity_3]
Layers=m2
Via=m2txt
[Connectivities/Connectivity_4]
Layers=m3
Via=m3txt
[Crc]
CellCount=1
[Crc/Cell_0]
Name=hipex_ex18
NetCount=0
[Crc/Cell_All]
ThresholdCap=-1
ThresholdRes=-1
[Crc/Cell_Top]
ThresholdCap=-1
ThresholdRes=-1
[Crc/Details]
DetailedDisplay=0
DetailedSummary=0
DisplayPartitions=0
TitleLine=0
[Crc/Input]
Directory=SPF_JS
File=hipex_ex18.dspf
Format=DSPF
[Crc/Output]
Directory=CRC_Files
File=hipex_ex18.dspf.crc
Format=DSPF
[Crc/Reduction]
Authorize=0
CouplingMode=0
ParallelCheck=0
PortFile=
SerieCheck=0
[Erc/DangleNodes]
Netlist=0
Report=1
[Erc/Errors]
SoftcheckWarnings=0
[Erc/OpenNodes]
Rename=0
Short=0
[Erc/ShortedNodes]
GenerateName=0
MultilabelName=MULTILABEL
[Erc/Warnings]
BJT=0
MOSFET=1
[Explosion]
AutoExplode=0
CellArrayReduction=0
KeepFlattenCells=1
Wiring=0
[External]
CapacitanceUnit=pF
DeckBuildVersionForHipex=
LengthUnit=um
RCcornerCount=3
RCcorners=1
ResistanceUnit=Ohm
TernaryConnectThroughTouch=0
UseCurLayoutText=1
UseCurProcess=1
UseCurProcessCommon=1
UseCurProcessVictoryRCx=1
UseCurTechConnect=1
UseCurTechDevice=1
UseDerLayersDRCFile=1
UseIntDrcScript=0
UseIntLayoutTextScript=0
UseIntProcessScript=0
UseIntProcessScriptCommon=0
UseIntProcessScriptVictoryRCx=0
VictoryMeshVersionForHipex=
VictoryProcessVersionForHipex=
[External/RCcorner_0]
RCcornerCtechFile=tech/typ_c_js.lisa
RCcornerName=RCtyp
RCcornerRtechFile=tech/typ_r_js.lisa
[External/RCcorner_1]
RCcornerCtechFile=tech/max_c_js.lisa
RCcornerName=RCmax
RCcornerRtechFile=tech/max_r_js.lisa
[External/RCcorner_2]
RCcornerCtechFile=tech/min_c_js.lisa
RCcornerName=RCmin
RCcornerRtechFile=tech/min_r_js.lisa
[FsCExtraction]
CapMinValue=1e-20
ConductorFilter=0
Decomposition=1
DecompStep=0
DecompStepValue=-1
DomainLimitations=0
DomainLimitXmax=0
DomainLimitXmin=0
DomainLimitYmax=0
DomainLimitYmin=0
GridStepX=0.5
GridStepY=0.5
GridStepZ=0.5
MaxIterations=100
Precision=0.01
Renew=0
RenewSavedFile=RenewSavedFile.sav
Stellar3DStructFile=3DStructureFile.str
Stellar3DStructGeneration=0
[FsExtr_GlobalSettings/CapacitanceOptions]
Count=10
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption0]
Name=CAPsolver=
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption1]
Name=Cjunc=
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption2]
Name=Ground
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption3]
Name=userCAPchoice=
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption4]
Name=DomainBoundaryCondition=
Use=0
Value=Mirror
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption5]
Name=fast
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption6]
Name=accurate
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption7]
Name=fixDummyCharge
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption8]
Name=biasConductors
Use=0
Value=
[FsExtr_GlobalSettings/CapacitanceOptions/CmdOption9]
Name=M2Iverysmall
Use=0
Value=
[FsExtr_GlobalSettings/CDloss]
Count=0
[FsExtr_GlobalSettings/ExtractionCapacitance]
AdaptCValue=0.04
CapAccuracy=3
MinCalValue=1e-19
UseAdaptC=0
UseCapAccuracy=0
UseMinCap=0
[FsExtr_GlobalSettings/ExtractionGeneral]
ExtractBoth=1
ExtractCap=1
ExtractRes=1
ExtractStructure=Contours
ExtractUseStructure=0
Model3D=1
RefineMax=0
RefineMaxValue=10
Tolerance=0
ToleranceValue=0
UseHEforCap=0
UseVEforRes=0
[FsExtr_GlobalSettings/ExtractionResistance]
AdaptRValue=0.04
External=0
MinResValue=0.01
ResAccuracy=1
UseAdaptR=0
UseMinRes=0
UseResAccuracy=0
[FsExtr_GlobalSettings/General]
CutlineArea_MaxX=0
CutlineArea_MaxY=0
CutlineArea_MinX=0
CutlineArea_MinY=0
SpecifyArea=0
TopCellName=
WorkArea_MaxX=0
WorkArea_MaxY=0
WorkArea_MinX=0
WorkArea_MinY=0
[FsExtr_GlobalSettings/JColumns]
Count=9
[FsExtr_GlobalSettings/JColumns/Column0]
Width=50
[FsExtr_GlobalSettings/JColumns/Column1]
Width=140
[FsExtr_GlobalSettings/JColumns/Column2]
Width=220
[FsExtr_GlobalSettings/JColumns/Column3]
Width=220
[FsExtr_GlobalSettings/JColumns/Column4]
Width=120
[FsExtr_GlobalSettings/JColumns/Column5]
Width=120
[FsExtr_GlobalSettings/JColumns/Column6]
Width=120
[FsExtr_GlobalSettings/JColumns/Column7]
Width=300
[FsExtr_GlobalSettings/JColumns/Column8]
Width=140
[FsExtr_GlobalSettings/Other]
DefaultCSV=
numPrecision=0
SendMailWhenFinish=0
ShowSpecifiedJobs=0
ShowStructureImg=2
UseCDloss=0
UserDefinedDecimalNumber=0
UserEMail=
WorkTemplate=%current_project%%current_cell%_#%order%
[FsExtr_GlobalSettings/Parallel]
AutoSelectParallelJobs=1
ParallelJobCount=1
ParallelMode=0
ReUseStructure=0
[FsExtr_GlobalSettings/ResColumns]
Count=7
[FsExtr_GlobalSettings/ResColumns/Column0]
Width=58
[FsExtr_GlobalSettings/ResColumns/Column1]
Width=47
[FsExtr_GlobalSettings/ResColumns/Column2]
Width=47
[FsExtr_GlobalSettings/ResColumns/Column3]
Width=64
[FsExtr_GlobalSettings/ResColumns/Column4]
Width=38
[FsExtr_GlobalSettings/ResColumns/Column5]
Width=120
[FsExtr_GlobalSettings/ResColumns/Column6]
Width=120
[FsExtr_GlobalSettings/SpecifyCleverVersion]
CleverVersion=3.10.15.R
SpecifyCleverVersion=0
[HdbGeneration]
AnnotatedGdsFile=
SmartLvsRuleFile=
UpdateCurrentTechnology=0
UseSmartLvsFiles=0
[HierViolatChecks]
Count=0
[Layout]
DelWhite=1
ExportAnnotate=0
FixedSize=0
Flatten=0
GlobalDatatypes=
Labels=0
NetFixedSize=0
NetLabels=0
Non45=0
Overlap=0
ParallelModeDeriv=1
Rebuild=0
SafeHierDerivation=0
SafeHierDerivType=1
ShortLabel=0
TopCell=hipex_ex18
TopLevel=0
TopTextDepth=1
[Layout/FixedSize]
Height=0
Width=0
[Layout/NetFixedSize]
NetHeight=0
NetWidth=0
[NodeName]
CaseSensitiveNetNames=0
GlobalNode=
GroundNode=GND
HierarchySeparator=/
InstancePrefix=I
NodeNameSeparator=_
NodePrefix=#
PinDelimiter=:
PowerNode=VDD
TopVirtualConnect=1
UseNdlInstNames=0
UseNdlNetNames=0
VirtualConnectNames=
VirtualNetFlag=0
VirtualNetSymbols=:
XY=0
[Output]
CommentModel=0
ExcludeLibraryPrefix=0
FlatNetlist=hipex_ex18_flat_js.spice
FlatNetlisting=0
GlobalsInSubcktPins=1
HierarchicalNetlist=hipex_ex18_hier_js.spice
Messages=0
NetlistLineLength=80
NetlistTextedPins=0
PModelOutput=0
SbcktPininfo=0
[Output/Parameters]
Capacitors=1
CapacitorsLw=0
LWOnly=0
Resistors=1
SdNoW=0
[Ports]
Count=0
[Project]
EditorVersion=5.2407.0.X
User=viktarm
[Rc]
CouplingMode=1
DeleteFloatingSubnets=0
DistributionMode=2
DspfOutput=1
DspfOutputDir=SPF_JS
IgnoreNets=
Miller=1
ParallelMode=0
ProcessorNumber=16
RcGetCsv=0
RcGetDspf=1
RcGetSpef=0
RcGetSpice=1
RcIgnoredNets=1
RCReduction=0
SelectedNodesList=
SmallResistance=0.0001
SpefOutputDir=SPF_JS
SpiceOutputDir=hipex_ex18_rc_hier_js.spice
SPM=1
SubCells=1
TauMin=0
TM=0
VictoryRCxParallelMode=0
VictoryRCxProcessorNumber=1
VictoryRCxVersion=
[Rc/OutputParameters]
DevicesAsInstances=0
ExtractDevices=0
Layer=0
SuppressSubcktEnds=0
XY=0
[Resistance]
ExtCurPresCoefs=tech/typ_r.lisa
HierarchicalNetlist=hipex_ex18_r_hier_js.spice
IgnoreDangles=0
IgnoreGround=1
IgnoreHierGlbNodes=
IgnoreNodes=
IgnorePower=1
OutputRDB=0
SelectedNodesList=
SerialMergeThreshold=0
SubNodeSep=~
Threshold=0
UseCurPresCoefs=0
UseFieldSolver=0
UseIntPresScrip=0
UseTextsAsSubnodes=0
[Resistance/Output]
LayerNames=1
LW=1
XY=1
[Resistance/OutputRDB]
Pins=0
TopOnly=0
[Stripes]
ActiveCollection=default
BoxSizeX=400
BoxSizeY=400
BoxVicinityX=50
BoxVicinityY=50
CapMappingFile=
CollectionsCount=1
DecompositionType=0
FsCExtract=0
FsCExtractMode=1
FsUtilizePreviousRuns=0
IncludeDangles=0
IncludeDummies=0
IncrementalCdbRdb=0
MnmBlockCount=0
MnmCExtract=0
StripeWidth=200
UseExternCapMapping=0
VicinityWidth=10
[Stripes/Collection_0]
BA_Names=0
IgnoredNets=0
Name=default
NetsCount=0
NetsList=
SelectedNets=0
SkipCells=0
SkipCellsFile=
TopOnly=0
TopOnlyNocells=0
[SubstrateExtraction]
BacksideConductivity=3.3e-10
BacksidePermittivity=6.2
BacksideThickness=10
IncludeBacksideModel=0
RunSipex=0
SiliconBackside=0
SiliconBacksideNode=cwsBackside
SiliconThickness=300
SipexManufacturingDatabase=
SipexVersion=
SpxTemperature=27
SubstrateExtractionMode=1