Every software package contains a full set of examples suitable for that version and are installed with the software. If you see examples here that are not in your installation you should consider updating to a later version of the software. These examples can be used by beginners and advanced users for product evaluation, teaching purposes, and self-training.
Required Modules
Victory Process
- 3D Oxidation
- 3D Diffusion & Implantation
Victory Mesh
- 3D Meshing
Victory Device
- 3D Simulator
This example demonstrates advanced 3D process and device simulations for a U-shaped trench power MOSFET, called a split-gate trench UMOSFET. It is related to the Silvaco Simulation Standard (Vol. 28, No. 1, 2018) article “Advanced Process and Device 3D TCAD Simulation of Split-Gate Trench UMOSFET. ”
For the low to medium voltage range (12 V ~ 250 V), the split gate structures have been widely used in the power MOSFET technologies. They provide the best trade-off between the breakdown voltage (BV) and specific on-state resistance (Rsp) for the vertical discrete power MOSFETs. Most of these solutions are based on the RESURF (Reduced Surface Field) effect of the Split-Gate Resurf Stepped Oxide (SG-RSO) along the drift region.
In the split-gate (SG) version of the UMOSFET, the lower part of the gate, called the field plate or split gate, is isolated from the gate so that the upper part next to the channel (the actual gate) and the lower part next to the drift region (the field plate) are independently connected, with the field plate being typically connected to the source (grounded). This drastically reduces the capacitance between the gate and the drain (Cgd), while still maintaining the RESURF effect induced by the field plate.
3D Advanced Process Simulation of a Split-Gate UMOSFET
In the first part of this example, Victory Process is used to build the device structure through advanced physics-based simulations of several process steps commonly used in modern split-gate UMOS fabrication. The simulated process steps include: a) formation of a deep trench with a rounded bottom by a combination of dry and wet etching steps, b) shield (thick) oxide growth, c) shield poly (field plate) deposition, d) inter-poly oxide deposition and etch back to obtain the thinner gate-oxide, e) gate poly deposition and etch back, f) core contact etching and deposition of the contact plug and metallization (for the source contact).
3D Numerical Mesh
Next, Victory Mesh is used for 3D meshing of the structure. Based on the complex shapes of materials (boundaries) and doping profiles, a 3D Delaunay mesh is generated to adequately resolve all the complex 3D geometric features and the electrical intricacies of the device.
3D Device Simulations
The Victory Device Simulator is then used to simulate a number of different device characteristics, including:
-Specification of materials, models and simulation parameters
-Simulation of steady-state Id-Vg, Id-Vd, and breakdown voltage (BV) characteristics
-Calculation of small-signal (AC) capacitance-voltage (C-V) characteristics
-Display of the results in Victory Visual
First, the initial solution is obtained (for zero bias). Then, the Id-Vg transfer characteristics are calculated from which the threshold voltage (Vth) and the transconductance gm-Vg characteristics can be extracted.
Next, the Id-Vd output characteristics are calculated, for a selected Vgs bias voltage.
The breakdown I-V characteristic of the split-gate UMOSFET is then calculated for gate bias Vg = 0 V.
Small-signal (AC) Capacitance-Voltage (C-V) Characteristics
The next step is to perform small-signal (AC) 3D TCAD simulations using Victory Device to obtain C-V characteristics of all the intrinsic capacitances of the UMOS device. In this example, we demonstrate the calculation of Capacitances vs. Drain Voltage (C-Vd) characteristics, which are often important for power MOSFETs.
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