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CIS_CCD_ex01.in : Emptying The Storage Well Using Quasi Fermi Levels

CIS_CCD_ex01.in : Emptying The Storage Well Using Quasi Fermi Levels

CIS_CCD_ex01.in : Emptying The Storage Well Using Quasi Fermi Levels

Every software package contains a full set of examples suitable for that version and are installed with the software. If you see examples here that are not in your installation you should consider updating to a later version of the software. These examples can be used by beginners and advanced users for product evaluation, teaching purposes, and self-training.

Required Modules

Victory Process

  • 2D Diffusion & Implantation
  • 2D Oxidation

Victory Mesh

  • 2D Meshing

Victory Device

  • 2D Simulator
  • 2D Optical

In this example a CCD structure is constructed using Victory Process. This structure is passed to Victory Device for electrical testing. The input file tests consist of three portions:

Construction of a CCD device

Emptying the storage well of carriers by directly setting the quasi-fermi levels

Illuminating the CCD with a light source and measuring the generated carriers

No drain contact is used, the emptying of the well is performed by setting the quasi-fermi level of the n- active region directly.
The structure of this CCD is two polysilicon gates on top of silicon separated by a nitride/oxide insulator layer. The right-hand gate will be used to collect the charge and the left hand gate will confine this charge under the right-hand gate.

In the Victory Device simulation, the CVT surface transport model is not needed as this simulation does not include charge transfer.
The key technique demonstrated by this example is the use of setting the quasi-fermi levels directly in Victory Device. To set the quasi fermi levels for electrons the parameter n.bias is used. For this to work, it is necessary to use a zero carrier solution. The setting of method carriers=0 specifies a zero carrier solution, and only Poisson’s equation for potential is solved.

Using ‘n.bias’ the electron quasi fermi level is set to +20V. This is a non-equilibrium condition so the only way to use the solution of the continuity equations is to observe the electron concentration is in transient mode. Victory Device is switched to solve for electron and holes using method carriers=2 . A short transient simulation is then performed and a structure file is saved. Plotting electron concentration in this structure file shows the CCD storage well to be depleted of electrons. An extract statement is used to quantify this.
In this CCD biasing scheme, the storage node to the left is biased to +12V and the containment node to the left is biased at -8V. This ensures that charges generated under the storage gate are collected there.
In the final stage of the input file the CCD storage node is illuminated. The light beam is defined in the BEAM statement to be normally incident from the top, with an origin of (6.85,-1), width 4um and wavelength 800nm. All reflections, refraction and absorption in the layers of the structure are simulated by Victory Device.
A transient illumination is defined lasting 1us. At the end of this time the amount of electrons trapped in the CCD can be measured using the extract statement.

Images

CIS_CCD_ex01_02.png
CIS_CCD_ex01_03.png
CIS_CCD_ex01_01.png

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