TFT_ex09.in : 3D Bottom-Gate Amorphous IGZO TFT Simulation

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TFT_ex09.in : 3D Bottom-Gate Amorphous IGZO TFT Simulation

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Required Modules

Victory Process

3D Structure Editor

Victory Mesh

3D Meshing

Victory Device

3D Simulator
3D TFT

The oxide TFTs utilizing amorphous InGaZnO material is the candidate material as a switching transistor for pixel or driver transistor for AMOLED in the future large scale and flexible consumer electronics. The fundamental and basic understanding of IGZO materials is very important to realize such a device in display area. This example performs 3D bottom gate oxide TFT structure generation using 3D Victory Process simulation and then simulates IDVG device characteristics extracting threshold voltage and subthreshold swing. This example consists of following items.

1. Structure formation using Victory Process syntax
2.
3. Material and model settings for bottom gate passivated IGZO TFT
4.
3. DOS(Density Of State) in a-IGZO bulk and at interface between IGZO and gate insulator

4. Forward Id/Vgs characteristics and extraction of Vth and Subthreshold swing

The bottom gate oxide TFT is initialized by glass substrate thickness of 5um using the INIT statement. The device size in x-y plane is defined by loading a layout file. The initial mesh is added by cartesian statement from loaded mask polygon edge information.

The next step is to deposit bottom gate metal and then make gate pattern with mask statement. The gate edge angle is defined by geometrical etching with 45 Degree. The electrode statement is used to attach “gate ” electrode name which is defined in the layout file. The double gate insulator is composed by SiO2(50nm) and Si3N4(400nm) and deposited by conformal deposition which is uniformly deposited on the bottom gate topography. The active oxide semiconductor (here, amorphous IGZO) with thickness of 50nm is uniformly deposited and then patterned by mask “ACT ” layer. Here we used a silicon as a default active channel material which will be modified to physical IGZO material in Victory Device part using REGION MODIFY statement.

The etch stopper oxide is deposited for active channel length and source/drain metal contact size.

For etch stopper size we used the same mask layer as “SD ” with reverse polarity. This makes a contact to channel layer, channel length, and gate source/drain overlap length. And then source/drain metal layer is deposited on this etch stopper layer. In this example, 10um channel length is assumed. The final electrode statement is to make source/drain electrode names.

The SiO2/Si3N4 passivation layers are deposited and then final structure is saved using Victory Mesh. Delaunay triangulation mesh is used for subsequent Victory Device simulation. For better accuracy we used “max.size=0.5 ” as a global mesh refinement, which means maximum feature size is not exceeded to 0.5um.

The key command in amorphous InGaZnO TFT device simulation is the n-type doping in the channel layer. We put 1e16/cm^3 n-type doping for electron carrier in the channel layer using region modify statement.

Source/Drain metal workfunction with barrier height:

The source/drain metal workfunction is the sum of IGZO affinity (4.16) and barrrier height of 0.16eV.

Physical model parameters for transport:

You can use finite non-zero contact resistance at source/drain by CONTACT statement.

The dielectric permittivity constant and basic band parameters such as band gap, band-edge mobility, and effective mass of electron were considered in MATERIAL statement. The effective density of states in band (Nc,Nv) were assumed by matching tails states of density of state in sub-band gap. The electron effective mass of 0.34*me is Nc~5e18/cm^3 at room temperature.

Density of states in sub-band gap of oxide semiconductor:

It is used to define a continuous density of trap states in the a-IGZO active channel bulk with DEFECTS statement. Next, we added interface traps site to the interface between gate insulator and channel using INTDEFECTS statement. It is now believed that density of states for oxygen-vacancy (Vo) in a-IGZO material is formed by shallow donor-like states or deep donor-like states. The tail distribution from conduction band-edge (Ec) is taken into account by NTA and WTA which are very important factor to characterize the performance of a-IGZO TFT under sub-threshold or below threshold conditions. The high mobility of amorphous IGZO materials as compared to a-Si:TFT is due to the low acceptor-like tail states(NTA).

Model statement:

In this model statement, we assumed the ambient temperature of 300K and Fermi statistics for carrier.

The field-dependent saturation mobility model is considered to saturation current level.

Numerical method:

Next, we use PAM.GMRES(64bit) muti-threaded version of iterative numerical solver. it is possible to define the number of CPUs used (-P “all ” or -P “# of CPUS) during simulation. The default is 1.

For detailed numerical options, please refer to Victory Device manual.

IDVG DC simulation:

The IdVg at low drain bias and high bias conditions were simulated and then threshold voltage and subthreshold swing values are extracted by EXTRACT statement. For sub-threshold swing value, we used slope of transconductance curve and then extracted by 1/Gm. For accurate subthreshold extraction, it is required to use very small voltage step during DC bias sweep.