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How to Eliminate Image Retention Issues with SmartSpice Flex Modeling

Image retention is a long-standing issue in the display community. To effectively solve this issue, or even to minimize its impact on their products, display manufacturers and consumer electronics vendors need to simulate this effect at the SPICE level. However, image retention is a result of dynamic device effects that cannot be modeled by other SPICE simulators in the market.

In this webinar, we describe how SmartSpice Flex Modeling technology can be used to simulate image retention issues. This solution, which is unique to Silvaco, can model any dynamic device effects in SPICE simulation. We show that, by adopting this solution, one can model hysteresis effects, the root cause of image retention issues. This enables design teams to simulate this problem in SPICE simulation, allowing display manufacturers and consumer electronics vendors to effectively mitigate this important problem that has been challenging the display community for years.

What You Will Learn

  • A quick review of image retention problems
  • A deeper understanding of their root causes
  • How to use SmartSpice Flex Modeling to simulate image retention
  • How to improve the quality of your display (or the display of your product)


Jody HeadshotDr. Jody Matos is a Ph.D. Computer Scientist who is passionate about research and development of software and hardware designs. Currently, he is the Director of Circuit Simulation at Silvaco, where he has been managing leading-edge R&D and business-related projects for EDA tools. His current tasks are mainly related to circuit simulation and analyses on analog, digital, and mixed-signal IC designs.
Dr. Matos received a Ph.D. degree in computer science from the Federal University of Rio Grande do Sul (UFRGS), Brazil, and a M.S. degree in microelectronics from the same institution. He has co-authored 30+ research papers and patent applications that mix knowledge of both computer science and microelectronics. Dr. Matos has also served as an expert reviewer and on technical committees of several renowned journals and international conferences in the fields of design automation.


Display designers, analog circuit designers, CAD and SoC design engineers, product managers, and engineering management in the circuit simulation field.

When: June 9, 2022
Where: Online
Time: 10:00am-10:30am-(PDT)
Language: English