• Parasitic Extraction Examples

    Utmost IV Examples

clex10.in : Inverter Cell with Lithographic Geometry

Requires: CLEVER

An inverter is one of the most common cells found in layouts. This example contains one inverter cell designed with 4 NMOS and 4 PMOS transistors. It is an illustration of how Clever inserts auxilliary nodes, as in example clex05.in, where necessary into the layout. The back-annotated layout may then be re-plotted in Maskviews.

This example applies lithographic techniques to more accurately simulate the non-uniform barrier layer, formed by the resist after the imaging photolithographic stage. VictoryProcess is called upon once again to simulate the non Manhatton structure creation. The etching process also uses a more physical 87 degree angled side-wall.

This example has been used in the CLEVER Tutorial and more information on it can be found there.

To load and run this example, select the Load button in DeckBuild > Examples. This will copy the input file and any support files to your current working directory. Select the Run button in DeckBuild to execute the example.

Input Files
Output Results
These examples are for reference only. Every software package contains a full set of examples suitable for that version and are installed with the software. If you see examples here that are not in your installation you should consider updating to a later version of the software.
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