Broad IP Portfolio & IP Management
Proven Secure Automotive, Interface and Processors IPs
High-speed PHYs and I/Os for FinFET and FDSOI Nodes
AMBA Secure Subsystems for IoT
Advanced Memory Interfaces – HBM2e, Combo DDR, 56G SerDes
Optimized Foundation IP for 180 to Sub-12 nm Nodes
Enterprise-level IP Management Solution
Broad IP Portfolio & IP Management
Proven Secure Automotive, Interface and Processors IPs
High-speed PHYs and I/Os for FinFET and FDSOI Nodes
AMBA Secure Subsystems for IoT
Advanced Memory Interfaces – HBM2e, Combo DDR, 56G SerDes
Optimized Foundation IP for 180 to Sub-12 nm Nodes
Enterprise-level IP Management Solution
Silvaco IP products and solutions include embedded processors, wired interfaces, bus fabrics, peripheral controllers, and cores for automotive, consumer and IoT/sensor applications. Samsung Foundry design IP is now licensed and supported by Silvaco. This catalog of IP meets the requirements for different consumer, mobile, and HPC applications including wired and high-speed interfaces, analog and mixed-signal blocks.
1
Interface PHYs
2
Interface Controllers
3
Automotive Controllers
4
AMBA IP Cores and Subsystems
5
Security Cores
7
Embedded Processors
8
Foundation IP
9
Xena IP Management
Contact Silvaco if you need additional info on a specific IP or you do not see the IP product you require.
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Rick Lazansky
Over the past two years, Silicon Catalyst has been working with key industry players to develop a complete ecosystem that economically and effectively supports the new wave of semiconductor startups that we are seeing today. Our Portfolio Companies have consistently been requesting IP as the critical element that we had not been able to deliver. Silvaco’s offering fulfills a real hole that has been impeding the success of these startups. We are glad to deliver this capability as we continue to build the semiconductor start up ecosystem.
Silicon Catalyst
CEO
Srinath Anantharaman
The integrated solution enables design teams to collaborate efficiently in a secure design environment when developing their IPs or SoCs either locally or across multiple design sites. It enables design teams to successfully tapeout their designs by mitigating the risk by sharing and using the correct version of the design data and IPs.
ClioSoft
CEO
Choosing the Right DDR Memory Subsystem for Your Next SOC!
High speed Interface Design: Best Practices
How to Secure an AMBA AHB Subsystem for the ARM Cortex M3 Processor
Samsung Foundry and Silvaco Design IP: The Right Solution for Your Next SoC!
What’s in the New MIPI Alliance I3C V1.1 Standard?