Silvaco IP offers a production-proven suite of wired interface IP for serial bus and debug applications.
| Category | Title | Features |
|---|---|---|
| I3C | I3C 1.1 Advanced Controller | I3C V1.1, APB 3.0, SDR, DDR, HDR-BT, IBI, including I3C Basic |
| I3C 1.1 Autonomous Target | I3C V1.1, APB 3.0, SDR, DDR, HDR-BT, IBI, including I3C Basic | |
| I3C 1.1 Advanced Target | I3C V1.1, APB 3.0, SDR, DDR, HDR-BT IBI, including I3C Basic | |
| I2C | I2C | I2C V2.1, APB 2.0, SMEBus 2.0, ACCESS.Bus |
| USB 2.0 | USB 2.0 HS, Host | USB 2.0, OHCI compliant, DMA, Bulk/Interrupt/Isochronous endpoints |
| USB 2.0 HS, Device | USB 2.0, DMA, Bulk/Interrupt/Isochronous endpoints | |
| Debug | IEEE 1149.7 TAP Controller | IEEE STD 1149.7 – 2009, JTAG ( IEEE 1149.1 ), 2-pin access, Reduced scan time |
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Srinath Anantharaman
The integrated solution enables design teams to collaborate efficiently in a secure design environment when developing their IPs or SoCs either locally or across multiple design sites. It enables design teams to successfully tapeout their designs by mitigating the risk by sharing and using the correct version of the design data and IPs.
ClioSoft
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Rick Lazansky
Over the past two years, Silicon Catalyst has been working with key industry players to develop a complete ecosystem that economically and effectively supports the new wave of semiconductor startups that we are seeing today. Our Portfolio Companies have consistently been requesting IP as the critical element that we had not been able to deliver. Silvaco’s offering fulfills a real hole that has been impeding the success of these startups. We are glad to deliver this capability as we continue to build the semiconductor start up ecosystem.
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