Machine Learning in Silvaco EDA Software

In the following video, Dr. Firas Mohamed, VP & GM, Machine Learning & Flow Optimization Division and GM, Silvaco France talks with Graham Bell about Machine Learning technologies deployed in Silvaco EDA tools at the SEMICON West 2019, July 9 - 11 at Moscone Center in San Francisco. A transcript of the video is also below.

5nm Success – Silicon Creations CEO Video Interview at DAC 2019

In the following video, I interview Silvaco customer Randy Caplan of Silicon Creations from the show floor at DAC 2019, in Las Vegas, about the latest trends and challenges for nanometer IC design success. He talks about using a suite of Silvaco design tools down to the latest 5 nm silicon process nodes. A full ranscript of the conversation is below, as well.

Unraveling and Optimizing Transistor-Level Simulation

Six-Sigma Analysis of Digital Standard Cells

library of digital standard cells implements both Boolean logic and sequential storage functions. These foundation IPs are used extensively and repeatedly within application specific integrated circuits (ASICs), field programmable arrays (FPGAs), microprocessors and system-on-chip devices (SOCs).